Over current protection circuit of semiconductor switching...

Details Over current protection circuit of semiconductor switching... Over current protection circuit of semiconductor switching...

2001-01-25

2003-07-15

Huynh, Kim (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific current responsive fault sensor

C361S093100, C361S098000, C327S310000

Reexamination Certificate

active

06594131

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-017216, filed Jan. 26, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to an over current protection circuit of a gate voltage controlled type semiconductor switching device, and more particularly to a control circuit for controlling a semiconductor switching device on the basis of the detected current result, the circuit being used in a semiconductor switching device such as, for example, an IGBT (insulated gate bipolar transistor), a power MOSFET (metal-oxide-silicon field effect transistor) or the like.
The IGBT which is a gate voltage controlled type semiconductor switching device includes an IGBT (a sense IGBT) having a current detection terminal through which a detection current flows in accordance with a main current (a load current).
FIG. 5
shows a basic circuit of a sense IGBT, and
FIG. 6
shows a conventional over current protection circuit of the sense IGBT.
In the circuit shown in
FIG. 5
, reference numeral
10
denotes the sense IGBT. The IGBT comprises a plurality of unit cells having the same structure provided on the same semiconductor chip are divided to be M:1 on the side of the main current element
10
a
and on the side of detection current element
10
b.
These unit cells
10
a
and
10
b
are connected in parallel to each other.
The gate of the main current element
10
a
and the gate of the detection current element
10
b
are connected to the gate terminal
11
, and the collector of the main current element
10
a
and the collector of the detection current element
10
b
are connected to the collector terminal
12
. As a consequence, the ratio of a main current IMAIN flowing through the main current element
10
a
and a detected current ISENS flowing through the detection current element
10
b
is equal to the division ratio of the unit cells. In the circuits shown in
FIGS. 5 and 6
, a current IC denotes a sum of the main current IMAIN and the detected current ISENS.
For over current protection of the IGBT
10
, in this embodiment, as shown in
FIG. 6
, a resistor
15
for current detection is connected between the emitter terminal
13
on the side of the main current element
10
a
and a current detection terminal (a sense terminal)
14
which is an emitter terminal on the side of the detection current element
10
b
. Further, an NMOS transistor
50
is connected between the gate of the IGBT
10
and the emitter terminal
13
. The NMOS transistor
50
has a drain connected to the gate of the sense IGBT
10
, an source connected to one terminal of the current detection resistor
15
, a gate connected to the other terminal of the current detection resistor
15
, so that a voltage drop (the detected voltage) across the current detection resistor
15
is applied to the gate of the NMOS transistor
50
.
In the over current protection circuit shown in
FIG. 6
, the main current element
10
a
and the detection current element
10
b
are shown as a single combined element
10
. This is only for the simplicity of the drawing. The main current element
10
a
and the detection current element
10
b
are in a form of separate components in the actual circuit structure.
With this circuit structure, it is possible by the NMOS transistor
50
to detect the time when the detected voltage reaches a set value for an over current cut-off. That is, when an over current flows through the sense IGBT
10
, the NMOS transistor
50
is turned on, so that the gate voltage of the sense IGBT
10
is decreased to 0V and thus the sense IGBT
10
is turned off.
In the over current protection circuit shown in
FIG. 6
, a reference numeral
16
denotes a gate resistor connected in series to the gate of the sense IGBT. A reference numeral
17
denotes a diode for a reverse bias prevention connected in a forward direction between a gate of the sense IGBT
10
and a drain of an NMOS transistor
50
.
For the current detection resistor
15
, the NMOS transistor
50
, the gate resistor
16
, the diode
17
and the capacitor element
18
, individual parts separate from the sense IGBT
10
are used. Alternatively, these circuit components and the IGBT
10
are formed on the same semiconductor chip. Further alternatively, these circuit components are formed on a semiconductor chip for controlling the sense IGBT, separate from the semiconductor chip on which the sense IGBT
10
is formed.
FIG. 7
shows waveforms used for explaining time transition of the over current protection operation of the sense IGBT in the over current protection circuit of FIG.
6
.
The gate voltage VG is constant until the detection of the over current of the sense IGBT. At the time of the detection of an over current of the sense IGBT (i.e., when the detected voltage VSENS reaches the over current cut-off set value), the NMOS transistor
50
is turned on, the gate voltage of the sense IGBT
10
is decreased to 0V and the sense IGBT is turned off to cut the main current IMAIN off. As a consequence, it is possible to realize a protection function for preventing the breakdown of the sense IGBT
10
due to the over current.
However, since a voltage drop (the detected voltage VSENS) is generated between an emitter terminal on the side of the main current element
10
a
and a current detection terminal
14
on the side of the detection current element
10
b,
the voltage VCE applied between the collector and the emitter of the main current element
10
a
is different from the voltage VCS applied between the collector and the emitter of the detection current element
10
b
by the detected voltage VSENS.
That is, the following equation is established.
VCS=VCE−VSENS
VCS: a voltage between the collector and the current of the detection current element
10
b
VCE: a voltage between the collector and the emitter of the main current element
10
a
VSENS: detected voltage
Consequently, the current which actually flows through the detection current element
10
b
is smaller than the current of the design value by the division ratio of the unit cells. As the characteristic of the sense IGBT has become improved and the on-voltage has become decreased, the difference between the current actually flows and the current of the design value greatly influences on a difference between a voltage between the collector and the emitter of the main current element
10
a
and a voltage between the collector and the emitter of the detection current element
10
b
, and as a result a sufficient detection current ISENS cannot be obtained.
FIG. 8
is a characteristic graph showing relational curves between the detected voltage VSENS in the over current protection circuit shown in FIG.
6
and the main current IMAIN of the sense IGBT.
As can be seen from this characteristic graph, before the characteristic of the sense IGBT has been improved and the on-voltage has been decreased, the correlation between a detected voltage VSENS and the main current IMAIN shows linearity as shown by the characteristic curve I. However, recently, since the characteristic of the sense IGBT has been greatly improved and thus the on-voltage has been largely decreased, the linearity is lost and an abrupt curve as shown by the characteristic curve II is generated.
As a consequence, a variation in the main current IMAIN becomes large with respect to the variation in the detected voltage VSENS and the cut-off level of the over current largely varies, and a sufficient protection function cannot be realized. In the worst case, it is impossible to prevent the breakdown of the sense IGBT
10
.
As a countermeasure against such a disadvantage, it is considered that the detected voltage VSENS is lowered by decreasing the value of the current detection resistor
15
in the over current protection circuit, and a difference between a voltage between the collector and the emitter of the main current element
10
a
and a voltage betwee

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