Output stage resistant against high voltage swings

Details Output stage resistant against high voltage swings Output stage resistant against high voltage swings

2006-10-17

2006-10-17

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S318000, C327S319000

Reexamination Certificate

active

07123059

ABSTRACT:
Circuit comprising a signal input (11) for receiving an input signal (s(t)) and a digital output stage (15) being designed for operation at a supply voltage (VDD). The output stage (15) comprises a series of two n-channel CMOS transistors (no1, no2), a common node (17) between the two n-channel CMOS transistors (no1, no2), and an output port (16). Active voltage limiting means (14) are arranged between the signal input (11) and the common node (17) for limiting voltages (VNM) at the common node (17) to a voltage limit (Vmax). The voltage limiting means (14) are controllable byte state of the input signal (s(t)).

REFERENCES:
patent: 5889420 (1999-03-01), Poechmueller
patent: 6107829 (2000-08-01), Martin
patent: 11 330942 (1999-11-01), None
patent: 2000 228628 (2000-08-01), None

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