Output stage for high-speed comparator circuits

Details Output stage for high-speed comparator circuits Output stage for high-speed comparator circuits

2001-04-30

2003-04-22

Tran, Toan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S170000, C327S432000

Reexamination Certificate

active

06552584

ABSTRACT:

TECHNICAL FIELD
The present invention broadly relates to an output stage for high-speed comparator circuits.
BACKGROUND OF THE INVENTION
Many integrated circuits incorporate a voltage regulator and a comparator for driving an electric load, for instance.
In particular, an output stage for such an integrated electronic circuit includes a driver circuit of an electric load having at least one capacitive component. The output stage comprises a first or pull-up component and a second or pull-down component which are connected in series with each other between a first or supply voltage reference and a second voltage reference.
As is well known, an integrated circuit for driving electric loads typically includes a regulator and a comparator for driving a power transistor, such as a power MOS, outside the integrated circuit. The comparator functions to set the operational threshold of the integrated driver circuit.
Essentially, the voltage regulator provides a regulated supply for the electric load, through the power transistor being enabled by the comparator. The output of the comparator is connected to the control terminal of the power transistor; the transistor is turned on as the main supply voltage rises above a threshold value which is set by the comparator.
The comparator is to drive the power transistor at a high speed, in order to prevent “glitches” from being generated during transition of the output control from the voltage regulator to the power transistor.
FIG. 1
of the accompanying drawings shows schematically an integrated regulator/comparator circuit
2
according to the prior art. The circuit
2
includes a voltage regulator
5
having an output coupled between a MOS power transistor and a load. The circuit
2
also includes a comparator
6
having a first input coupled to a voltage reference Vcc, a second input coupled to a reference voltage, and an output coupled to the voltage regulator
5
and a gate of the power transistor.
The overall speed of the circuit is mainly dependent on the speed of the comparator
6
, and in particular, on the amount of delay introduced by the various stages of the comparator. However, the strength of the charge current to the inner capacitance Cg of the power transistor is also a factor in the final stage delay.
Furthermore, it should be considered that the power transistor is an external device, and that the connection terminal between the integrated driver circuit and the power transistor must be safeguarded against incidental shorting. This reflects unfavorably on the circuit construction of the output stages of comparators
To provide a comparator with a final stage which can charge a capacitive load, such as the inherent capacitance of a power transistor, at a fast rate, the current used to drive the capacitance would have to be maximized.
With reference to the diagram of
FIG. 2
, the voltage Vc across said capacitance is given as:
Vc
=1
/C*∫i dt
=(
I*T
)/
C
  (1)
from which the charge duration T is obtained, as follows.
T=Vc
*(
C/I
)  (2)
However, while on the one side, the charge current should be maximized for reduced delay in driving the external electric load, on the other side, this current must be limited, to avoid destruction of the comparator final stage on the occurrence of incidental shorts to the voltage references, i e., ground GND and supply Vcc, of the output stage.
As said before, it is common practice to provide the final stages of comparators with protective circuit portions that protect against shorting.
Shown schematically in
FIG. 3
is an example of a bipolar type of final stage along with its protective circuit portion. The protector comprises a pair of sensing resistors R
1
, R
2
which are connected at a connection terminal to the power transistor, represented by its inherent capacitance Cg
3
.
Each resistor connects the input terminals of a respective amplifier, itself connected between the collector and the base of each bipolar transistor in the output stage.
In this circuit arrangement, as the current in the capacitive load Cg exceeds a predetermined value, the protector is operated to limit the value of the current. Anyhow, the final stage is sized for the largest shorting current therethrough, since the protector is there to limit the current maximum.
This approach has certain drawbacks, as specified herein below:
a protector is incorporated to the final stage;
the final stage is sized to accept the shorting current;
the resistors R
1
, R
2
lower the value of the driving time constant for the control terminal of the power transistor; and
with static output loads, the dynamic range of the circuit is adversely affected by the sensing resistors provided.
Shown schematically in
FIG. 4
is an embodiment of a MOS transistor final stage that includes a pull-up MOS transistor
7
connected between a first voltage reference Vcc and an output terminal
9
; and a pull-down MOS transistor
8
connected between the output terminal
9
and a second voltage reference (ground). Both MOS transistors
7
,
8
are driven by a single driver. The protector is omitted from this stage because the stage transistors can be sized to accept shorting currents.
However, this approach also has drawbacks.
Sizing the final stage adds to designing and manufacturing costs.
Also, the pre-drive stages of the final stage must be sized to suit the capacitive load of the final stage, as well as the operation timing.
SUMMARY OF THE INVENTION
An embodiment of this invention provides a novel output stage, for a comparator of an integrated driver circuit, with such structural and functional features that the final stage can be operated at a faster rate and the area requirements of the stage be minimized, thereby overcoming the aforementioned drawbacks of the prior art.
Another embodiment of the invention provides a driving method which can be applied to final stages of any description, i.e., stages including bipolar, MOS or combined components.
The final stage has such structural and functional features that it requires less circuit area for a given speed of operation than prior solutions.
A concept behind this invention is one of having the static control of the comparator final stage separated from its dynamic control.
More particularly, an embodiment of the invention provides for dual (static and dynamic) drive where the final stage is of the bipolar type. With a MOS type of final stage, on the other hand, the capacitive load is driven either statically or dynamically.
With combined technology circuits, e.g., constructed of a bipolar component and a MOS component, each component is driven independently according to whether it is in a static or a dynamic load condition.
Essentially, the final stage supplies large amounts of current at changeovers.
The features and advantages of the output stage and driving method of this invention will be apparent from the following description of embodiments thereof, given by way of non-limitative examples with reference to the accompanying drawings.


REFERENCES:
patent: 4477741 (1984-10-01), Moser, Jr.
patent: 4829199 (1989-05-01), Prater
patent: 5410262 (1995-04-01), Kang

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