Output stage and related logic control method applied to...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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C345S100000

Reexamination Certificate

active

07986290

ABSTRACT:
Output stage and related method applied to source driver/chip of LCD panel. While performing dot polarization inversion for even/odd channels of LCD panel, n-channel and p-channel MOS transistors of symmetric layout are respectively adopted for alternately transmitting a positive polarization signal of higher swing range and a negative polarization signal of lower swing range from corresponding drivers of asymmetric layout to the even/odd channels, such that a layout area for alternating polarizations can be reduced. Also, the invention directly ties inputs of the output drivers to VDDor VSSso as to turn off the drivers for providing high impedance at the even/odd channels when necessary.

REFERENCES:
patent: 6894665 (2005-05-01), Zimlich
patent: 7133013 (2006-11-01), Kamezaki et al.
patent: 2004/0169543 (2004-09-01), Doutreloigne et al.

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