Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform amplitude control
Reexamination Certificate
2000-01-28
2001-11-27
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Rectangular or pulse waveform amplitude control
C327S331000, C327S362000, C327S378000, C363S021010, C363S025000, C326S034000
Reexamination Certificate
active
06323707
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a semiconductor device provided with an output circuits each outputting a high frequency signal.
DESCRIPTION OF THE RELATED ART
In a semiconductor device, an input/output circuit has been conventionally configured with the use of a CMOS (Complementary Metal-Oxide Semiconductor). In this case, there has been such an effect that fabrication cost of a semiconductor device per se is reduced, and the power consumption in the semiconductor device is reduced, and the like. Particularly, if an input/output circuit which satisfies an ECL (Emitter-Coupled Logic) interface standard is used for connecting between an LSI and an optical module element, the interposition of a bipolar device is dispensed with.
While there is the advantage set forth above, there is such a drawback that an input/output circuit composed of a CMOS, particularly an output circuit is liable to vary in an output level of the semiconductor device due to variation in a power supply voltage, variation in ambient temperature, and variation in fabrication of wafers and the like. Variation in fabrication of wafers used here means that electric characteristics of an integrated circuit formed on some region of a wafer are different from those of an integrated circuit formed on a region other than the some region of the wafer, which occurs in a fabrication process of wafers.
As communications are recently increasing faster, a frequency of a transfer signal has been set to a higher level while an amplitude of the transfer signal has been set to a lower level. If the transfer signal becomes small in amplitude, there is a possibility that the transmit and receive of the transfer signal is rendered unstable by slight variation in an output level. That is, it is necessary to suppress variation in an output level to the minimum so as to realize a stable transmit and receive of the transfer signal.
To this end, there has been proposed a conventional output circuit as disclosed in Japanese Patent Laid-Open Publication No. 9-186580. As shown in
FIG. 1
, an output circuit
101
is rendered enable in response to an output enable signal OE which is inputted via an input pad
102
. A load
104
is charged or discharged in response to an input data signal INPUT which is inputted via an input pad
103
so that an output signal is transferred to the outside of the semiconductor device via an output pad
105
. A first inverter means
106
and a second inverter means
107
output signals having voltage levels corresponding to variation in a power supply voltage Vcc and variation in ambient temperature to a NOR gate
108
and a NAND gate
109
.
The NOR gate
108
and the NAND gate
109
supply either a signal of logical high level (hereinafter referred to as “H level”) or a signal of a logical low level (hereinafter referred to as “L level”) to a p-channel transistor
110
and an n-channel transistor
111
in response to voltage levels of signals outputted from the first and second inverter means
106
,
107
. Threshold voltages at the NOR gate
108
and the NAND gate
109
are accurately regulated.
With such an operation set forth above, a current outputted to the outside of the semiconductor device via the output pad
105
becomes a current regulated in response to variation in the power supply voltage Vcc and variation in ambient temperature. Accordingly, variation in a voltage level of an output signal outputted to the outside of the semiconductor device via the output pad
105
is suppressed to the minimum.
Although it is expected that the foregoing conventional output circuit has an effect that variation in a voltage level of an output signal caused by variation in the power supply voltage Vcc and variation in ambient temperature can be suppressed, threshold voltages at the NOR gate
108
and the NAND gate
109
for detecting variation in the output signal need be accurately regulated in a fabrication process of wafers so that variation in the voltage level of the output signal is hardly suppressed when there occurs variation in fabrication of wafers.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a semiconductor device capable of transferring a high frequency signal having less amplitude while suppressing variation in a voltage level thereof even if there occur variation in a power supply voltage, variation in ambient temperature and variation in fabrication of wafers.
To achieve the above object, the semiconductor device according to the invention is provided with an output signal level control circuit comprising a pulse signal output circuit for charging or discharging a capacitor in response to a clock signal and outputting a pulse signal having a pulse width in response to time for charging or discharging the capacitor, a control signal generation circuit for outputting a control signal having a first voltage level in response to the pulse width, and output circuits for regulating a power supply voltage or a ground voltage supplied thereto respectively in response to the control signal and outputting output signals each having a second voltage level in response to the power supply voltage or the ground voltage.
REFERENCES:
patent: 4316155 (1982-02-01), Hanisko
patent: 5644481 (1997-07-01), Konishi et al.
patent: 3-38862 (1991-02-01), None
patent: 5-242681 (1993-09-01), None
patent: 6-96586 (1994-04-01), None
patent: 7-131316 (1995-05-01), None
patent: 9-139656 (1997-05-01), None
Lam Tuan T.
Nguyen Minh
OKI Electric Industry Co., Ltd.
Volentine & Francos, PLLC
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