Output-processing circuit for a neural network and method of usi

Details Output-processing circuit for a neural network and method of usi Output-processing circuit for a neural network and method of usi

1994-03-31

1999-09-28

Malzahn, David H.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708709, 708705, G06F 750

Patent

active

059580011

ABSTRACT:
An output-processing circuit for a neural network, which may be implemented on an integrated circuit, comprises at least one latch and at least one adder. Outputs from a plurality of neurons are sequentially received by the output-processing circuit. The output-processing circuit uses gating functions to determine which neuron outputs are summed together to produce neural network outputs.

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patent: 5375079 (1994-12-01), Uramoto et al.
Cokier et al, "Multiple Input Serial Adder Using Counter" IBM Tech. Disclosure Bullitin vol. 19 No. 11 Apr. 1977 pp. 4215-4216.

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