Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-10-06
2002-05-07
Nguyen, Chanh (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S095000, C345S098000, C345S100000
Reexamination Certificate
active
06384805
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a source driver for driving display portion of a liquid crystal display (hereinafter referred to as LCD) device, more particularly, relates to an averaging circuit for averaging output levels of a source driver.
2. Prior Art
As an example of a source driver for an LCD device, a block diagram of a source driver SDn corresponding to an n-th (wherein n represents a positive integer) output port On is shown in FIG.
2
. In
FIG. 2
, M
1
n represents a portion corresponding to the n-th output port On in a memory M
1
wherein data corresponding to display is stored. The reference numeral
14
represents a data bus for transmitting data corresponding to display to the memory M
1
(M
11
, M
12
, . . . , M
1
n, . . . ). AR represents an address register for specifying memory for storing data corresponding to display. Accordingly, when the address register AR specifies the memory M
1
n, data is transmitted to the memory M
1
n by the data-bus
14
. The address register AR may often comprises a shift register, however component of the address register AR is not limited to a shift register.
When all the data corresponding to display are stored in the memory M
1
(M
11
, M
12
. . . , M
1
n, . . . ) and the time to display data comes, data in the memory M
1
n is shifted to the memory M
2
n. The memory M
2
n represents a portion corresponding to the n-th output port On in the memory M
2
wherein data corresponding to display is transmitted to a D/A converter T after said data is received from the memory M
1
. Tn represents a portion corresponding to the n-th output port On of the D/A converter T, which converts digital data received from the memory M
2
into analogue data and then transmits the analogue data to an output driver D. Dn represents a portion corresponding to the n-th output port On of the output driver D comprising an operation amplifier wherein an output port of the D/A converter T is connected to a positive input port and an output signal O is transmitted to an output line
12
while being fed back to its own negative input port.
In such a conventional art described above, unevenness and defects of source driver chips generated in the manufacturing process may often cause output levels to become uneven, as shown in FIG.
3
(
a
) and (
b
). FIG.
3
(
a
) shows unevenness of n-th output levels, in which X and O respectively indicate a slightly higher and a slightly shorter output level than the other output levels, when all the output signals are expected to be on the same level. If all the output signals are not on the same level, a bright line corresponding to X or dark line corresponding to O is displayed longitudinally on the LCD display, and thus display quality is degraded to a great extent.
As shown in FIG.
3
(
b
), output level is slightly different depending on each output terminal, because properties are slightly different depending on each source driver chip. If output level is slightly different depending on each output terminal, the left part and the right part of the display screen are slightly different in brightness. Thus, display quality is degraded. Even if substantially ideal output levels are secured inside of a chip, since a large number of source driver chips are used in each LCD device, output levels may be different between chips. Because of this, brightness may often be different between interfaces displayed by individual chips. Thus, display quality is also degraded in this case.
As a result of our preliminary investigation of preceding arts prior to filing an application for a patent related to the present invention, the Japanese Laid Open Patent Publications No. 1-281497 and No. 9-237068 were detected. The Laid-Open Japanese Patent Publication No. 1-281497 discloses an LCD device comprising an average-level-detecting means for detecting an average level of display signals transmitted from external sources. This LCD device corrects at least either of DC-level or amplitude of display signals in accordance with output signals of the average-level detecting means in order to be adopted to standardized penetrating power characteristic prescribed for voltage of the LCD panel. The above-cited art aims to achieve display performance excellent in linearity and contrast by this correction.
However, the above-cited invention relates to the correction which is executed in a stage prior to transmitting data into a source driver (which corresponds to the reference numerals
17
, or
15
and
17
in the above-cited Japanese Patent Publication), and yet, data R, G, B, are analogue signals. Further, different circuits
19
,
20
, and
21
are used respectively for data R, G, and B to correct display signals. Concretely, data R, G, and B are corrected respectively by the different circuits
19
,
20
, and
21
. For this reason, it might be possible to correct display signal into colors different from what is intended.
The Laid-Open Japanese Patent Publication No. 9-237068 discloses a picture display device comprising a signal-level-detecting means for detecting respective level of data signals separately and a signal-level-control means for controlling signal levels of predetermined data signals of said data signals based on detected outputs of the signal-level detecting means so that the levels of data signals can coincide with predetermined data signals. This picture display device aims to suppress the generation of display unevenness caused by the difference properties of the channel.
However, the above-cited invention relates to correction which is executed in a stage prior to transmitting data into a source driver (corresponding to the reference numerals
12
and
13
shown in the above-cited Japanese Patent Publication), and yet, data R, G, B are analogue signals. Further, neither error of added integration circuit
57
and comparison circuit
58
nor an adverse effect on an analogue switch
12
by error has been taken into consideration. Consequently, these errors may cause errors in properties of a channel.
An object of the present invention is to improve display quality of the LCD device and yield of source-driver chips by adding a slight circuit, and averaging and evening out output levels of LCD source drivers.
SUMMARY OF THE INVENTION
The present invention is directed to an output-level averaging circuit for a LCD source driver (LCn) comprising an average-value-detecting means (
22
, S
1
n
) for detecting an average value Ave of output signals (O
1
, O
2
, . . . , On, . . . ) of output drivers (D
1
, D
2
, . . . , Dn, . . . ), an electric-potential-difference detecting means (Cn, S
2
n
, or S
3
n
) for detecting electric potential difference between the detected average value Ave and output levels of the output driver D, and a feedback means (S
4
n
) for feeding back detected electric potential difference by adding it to the output driver D.
REFERENCES:
patent: 5619221 (1997-04-01), Hirai et al.
patent: 5744986 (1998-04-01), Yamada et al.
patent: 5812106 (1998-09-01), Hughes
patent: 5926162 (1999-07-01), Wood et al.
patent: 6222516 (2001-04-01), Oda et al.
patent: 1-281497 (1989-11-01), None
patent: 9-237068 (1997-09-01), None
Alphonse Fritz
International Business Machines - Corporation
Nguyen Chanh
Scully Scott Murphy & Presser
Underweiser Marian
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