Output interface circuit between two circuits of different natur

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307448, 307450, H03K 1912, H03K 1716

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active

050436074

ABSTRACT:
This interface constitutes a matching of the output signals of a first circuit, made of GaAs for example, with the limit values of the input signals of a second digital circuit, made of silicon for example. It has a current amplifier which receives the output signal of the GaAs circuit. The voltages at the high level are controlled by a diode in series with a transistor which is then on. At the low level, the transistor is off, and it is two diodes, in parallel with the transistor, that control the output voltage. This interface is integrated into the chip of the digital circuit, made of GaAs. Single figure.

REFERENCES:
patent: 4410815 (1983-10-01), Ransom et al.
patent: 4568843 (1986-02-01), Gloanec et al.
patent: 4743957 (1988-05-01), Hirayama
patent: 4800303 (1989-01-01), Graham et al.
patent: 4810905 (1989-03-01), Graham et al.
patent: 4926071 (1990-05-01), MacMillan et al.
Patent Abstracts of Japan, vol. 11, No. 20, (E-472) (2467), Jan. 20, 1987, & JP-A-61 192123, Aug. 26, 1986, "ECL Level Output Buffer Circuit", K. Toyama.
Patent Abstracts of Japan, vol. 9, No. 110, (E-314) (1833), May 15, 1985, & JP-A-60 1922, Jan. 8, 1985, Y. Oomori, "Level Converting Circuit".
IEEE Proceedings of the Gallium Arsenide Integrated Circuit Symposium, Nov. 9-11, 1982, pp. 17-20, New York, U.S.A., D. Kinell, "A 320 Gate GaAS Logic Gate Array".

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