Output driver circuit in semiconductor device

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Utilizing three or more electrode solid-state device

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327112, H03K 17687

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active

059364564

ABSTRACT:
A power-supply circuit 121 generates a potential Vw which is approximately the higher of a power-supply potential VDD and a potential Vo at an output to set the potential Vw at an N-well of a pMOS pull-up transistor Qu equal to or higher than the potential at the source S and the drain D of the pMOS transistor Qu. The power-supply circuit 122 generates a potential Vs approximately equal to VDD--Vth when Vo<VDD, and turns off when Vo>VDD to prevent a current from flowing from the output OUT through the pMOS transistor Qu to the power-supply potential VDD, where Vth is the threshold voltage of the MOS transistors.

REFERENCES:
patent: 4782250 (1988-11-01), Adams et al.
patent: 4837460 (1989-06-01), Uchida
patent: 5151619 (1992-09-01), Austin et al.
patent: 5160855 (1992-11-01), Dobberpuhl
patent: 5379174 (1995-01-01), Kasamoto
patent: 5760618 (1998-06-01), Deliyannides et al.
Patent Abstracts of Japan, vol. 014, No. 320 (E-0950), Jul. 10, 1990 & JP 02 105624 A, Apr. 18, 1990.
Patent Abstracts of Japan, vol. 006, No. 081 (E-107), May 19, 1982 & JP 57 017227 A, Jan. 28, 1982.

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