Output device circuit and method to minimize impedance fluctuati

Details Output device circuit and method to minimize impedance fluctuati Output device circuit and method to minimize impedance fluctuati

1990-11-05

1991-12-24

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307243, 307576, 307603, 307597, H03K 301, H03K 1716, H03K 1756, H03K 513

Patent

active

050755692

ABSTRACT:
An output driver circuit of the type having two transmission gates, which are preferably CMOS transmission gates, is improved by inserting a variable, and preferably digitally programmable, pulse stretcher in the path of both the high-enable and the low-enable signals that open and close the high-side and low-side transmission gates. The variable delay element of the pulse stretcher can be set to an optimum delay by an "empirical" procedure that entails applying a series of pulses of incrementally varying duration to the output driver circuit, while monitoring the quality of waveform that they produce. A few of these waveforms will be distorted as a result of the impedance mismatch. The variable delay element of the pulse stretcher is then repeatedly adjusted. For each value of variable delay, another series of pulses of incrementally varying duration are again applied to the output of the driver circuit while the quality of the waveforms produced is monitored. The optimum value for the variable delay element setting is the value that most effectively minimizes the distortion in the monitored waveforms. After this empirical procedure has been used to determine one set of optimum timing values, another "inferred" method can then be used to measure the turn on and turn off times that resulted from the empirical method. Thereafter, this inferred method can be used to set the timing on other similar output driver circuits to these same times, without going through the more lengthy empirical procedure again.

REFERENCES:
patent: 3959731 (1976-05-01), Pomerantz et al.
patent: 4675546 (1987-06-01), Shaw
patent: 4754163 (1988-06-01), Aue et al.
patent: 4797585 (1989-01-01), Segawa et al.
patent: 4825102 (1989-04-01), Iwasawa et al.

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