Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2008-10-16
2009-10-06
Tran, Andrew Q (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S233170, C365S233130, C365S193000, C365S194000, C327S152000, C327S153000, C327S161000
Reexamination Certificate
active
07599245
ABSTRACT:
An output controller includes: an output enable signal generator for generating corresponding ones among a plurality of output enable signals based on a preset column address strobe (CAS) latency, each of the output enable signals having information relating to a delay time from an activation timing of a CAS signal; and an output driving signal generator for receiving the plurality of output enable signals corresponding to the preset CAS latency and outputting rising and falling output driving signals for controlling an output timing of data.
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Korean Office Action, with English Translation, issued in corresponding Korean Patent Application No. 2005-0130483, dated on Jul. 25, 2007.
Hynix / Semiconductor Inc.
Mannava & Kang P.C.
Tran Andrew Q
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