Output circuit with reduced switching noise

Details Output circuit with reduced switching noise Output circuit with reduced switching noise

1992-12-18

1994-10-25

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307594, H03K 1920

Patent

active

053592395

ABSTRACT:
According to this invention, each of a PMOS transistor and an NMOS transistor constituting an output stage has a plurality of gates, the gates of the PMOS and NMOS transistors are independently driven by a plurality of first inverter circuits and a plurality of second inverter circuits having transconductances different from each other. Therefore, all the PMOS and NMOS transistors constituting the output stage can be prevented from being simultaneously rendered conductive.

REFERENCES:
patent: 4725747 (1988-02-01), Stein et al.
patent: 4789793 (1988-12-01), Ehni et al.
patent: 4922676 (1991-02-01), Gerosa
patent: 5081374 (1992-01-01), Davis
patent: 5099148 (1992-03-01), McClure
patent: 5111075 (1992-05-01), Ferry

Affiliated with

Also associated with

Rating

Output circuit with reduced switching noise does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Output circuit with reduced switching noise, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Output circuit with reduced switching noise will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-137830