Output circuit with improved timing control circuit

Details Output circuit with improved timing control circuit Output circuit with improved timing control circuit

1984-11-21

1987-07-21

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307595, 307602, 307594, 307605, 365233, H03K 513, H03K 5159, H03K 1728, G11C 800

Patent

active

046820485

ABSTRACT:
A memory output circuit which can ensure that sufficient width of output data even in the case of high speed memory operation. The output circuit comprises an output section, a driver circuit for controlling the output section in response to a control signal, and a delay circuit adapted to reset the driver circuit when a predetermined time has elapsed from the enabling of the output section.

REFERENCES:
patent: 4061933 (1977-12-01), Schroeder et al.
patent: 4322825 (1982-03-01), Nagami
patent: 4390797 (1983-06-01), Ishimoto
patent: 4443714 (1984-04-01), Nakano et al.

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