Output circuit of a solid-state imaging device

Television – Camera – system and detail – Combined image signal generator and general image signal...

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348249, 348250, 358445, H04N 5217

Patent

active

057174571

ABSTRACT:
An output circuit of a solid-state imaging device has been improved. The output circuit receives a plurality of pixel signals in a dummy bit portion, an optical black portion and an effective pixel portion from a charge transfer device of the solid-state imaging device. The output circuit includes: a clamp circuit for clamping to a predetermined voltage a feedthrough level in a feedthrough period of each pixel signal output from a charge transfer device of the solid-state imaging device; a main sampling and holding circuit for sampling a signal level in a signal period of each pixel signal output from the clamp circuit and holding the signal level; a sub sampling and holding circuit for sampling an optical black level in a signal period of each pixel signal in the optical black portion output from the clamp circuit and holding the optical black level; a synchronous sampling and holding circuit for sampling the optical black level output from the sub sampling and holding circuit at a timing identical to that of the main sampling and holding circuit and holding the optical black level; and an arithmetic circuit for calculating the difference between the signal level output from the main sampling and holding circuit and the optical black level output from the synchronous sampling and holding circuit.

REFERENCES:
patent: 3940602 (1976-02-01), Lagnado et al.
patent: 4578707 (1986-03-01), Ozawa et al.
patent: 4608608 (1986-08-01), Nishizawa et al.
patent: 4886986 (1989-12-01), Watanabe
patent: 5216509 (1993-06-01), Hirasawa
patent: 5434619 (1995-07-01), Yonemoto

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