OUTPUT CIRCUIT, INPUT CIRCUIT, ELECTRONIC CIRCUIT,...

Details OUTPUT CIRCUIT, INPUT CIRCUIT, ELECTRONIC CIRCUIT,... OUTPUT CIRCUIT, INPUT CIRCUIT, ELECTRONIC CIRCUIT,...

2005-04-19

2005-04-19

Ton, My-Trang Nu (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Converging with plural inputs and single output

Reexamination Certificate

active

06882211

ABSTRACT:
A circuit is provided to make the propagation delay time of each signal path substantially the same without using a low resistance process even when wiring lengths are different. In the circuit, output nodes a to d are individually disposed at the output side of transmission gates TG2, TG4, TG6, and TG8, these output nodes a to d are connected so as to have an equal wiring length, inverters IV11and IV12are disposed at the output nodes a and d, and a common node e is disposed at a position where the wiring length from each of the inverters IV11and IV12becomes identical.

REFERENCES:
patent: 5789966 (1998-08-01), Bechade
patent: 5835045 (1998-11-01), Ogawa et al.
patent: 5955912 (1999-09-01), Ko
patent: 6094086 (2000-07-01), Chow
patent: 6160437 (2000-12-01), Kim et al.
patent: 6166583 (2000-12-01), Kochi et al.
patent: 6452423 (2002-09-01), Das et al.
patent: 6489825 (2002-12-01), Pasqualini

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