Output circuit for CMOS integrated circuit with pre-buffer to re

Details Output circuit for CMOS integrated circuit with pre-buffer to re Output circuit for CMOS integrated circuit with pre-buffer to re

1988-05-24

1989-12-26

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307542, 307572, 307242, 307605, 330264, 330295, H03K 13013, H03K 1716, H03K 1704, H03K 19017

Patent

active

048900168

ABSTRACT:
An output circuit includes a plurality of output buffer circuits and a plurality of pre-buffer circuits connected to drive the output buffer circuits. Some of the pre-buffer circuits are each constituted by P- and N-channel MOS transistors having channel widths or channel lengths which are large enough to drive the output buffer circuits, and the remaining pre-buffer circuits are each constituted by P- and N-channel MOS transistors whose channel widths and channel lengths are so determined as to set the current driving ability thereof sufficiently smaller than that of the corresponding output buffer circuits.

REFERENCES:
patent: 3378783 (1968-04-01), Gibson
patent: 4065715 (1977-12-01), Jaffe et al.
patent: 4103188 (1978-07-01), Morton
patent: 4464581 (1984-08-01), Oritani
patent: 4737670 (1988-04-01), Chan
patent: 4782253 (1988-11-01), Shoji
patent: 4785203 (1988-11-01), Nakamura
patent: 4786824 (1988-11-01), Masuda
Japanese Patent Disclosure (Kokai) No. 61-244124.

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