Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...
Reexamination Certificate
2002-09-27
2003-09-09
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Slope control of leading or trailing edge of rectangular or...
C327S112000
Reexamination Certificate
active
06617897
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to an output circuit which is able to adjust output voltage slew rate and output current and avoid short-circuit current. The output circuit of the present invention can apply in many different application for circuit restricted by output voltage slew rate; such as USB, to assure the properties of circuit comply with required specification.
2. Description of the Prior Art
Generally speaking, the signal of a circuit can be output from a simple inverter set
10
; as shown in
FIG. 1
, which is serially connected with stage
11
, stage
12
, and so on to stage
1
N. The output circuit of such kind is pretty simple and fewer components are required, which is very suitable for low speed, low cost application. However, the output voltage slew rate of the output circuit characteristic of these “simple” inverters is determined by the parasitic capacitor and the loading capacitor and is difficult to be adjusted by a user with simple method. Thus, in the situation that output signal is with high speed and high amplitude, the electromagnetic interference easily occurs, which seriously impacts the operation of the circuit.
Therefore, some restriction will be required for the output voltage slew rate for the application that the high-speed output signal and the electromagnetic interference should be put into consideration. As shown in
FIG. 2
, the U.S. Pat. No. 5,598,119 “Method and apparatus for a load adaptive pad driver” is showing how to do so. It is apparent that, with the control over the output voltage of PMOS and NMOS, the output voltage slew rate will be adjusted properly. In
FIG. 2
, the output circuit
20
generates slope signal with the slope generators
21
and
22
, and the output voltage of PMOS and NMOS will be controlled properly by the comparators
24
and
25
. So, the output voltage slew rate will be under control by controlling the slope of the slope signal generated by the slope generators
21
and
22
. However, since the comparators
24
and
25
consist of OP, the change of the output voltage of PMOS and NMOS is limited by the bandwidth and the output voltage slew rate of OP. When the slope signal input to OP is with higher slope, the output voltage of OP will probably generate ripple, or even cause OP unstable.
Besides the problem associated with output voltage slew rate, the output circuit
20
also comes with short-circuit current problem. When the output voltage of the output driver
22
reaches the half of the output amplitude, PMOS and NMOS will conduct simultaneously, and which cause the circuit system to suffer short-circuit current problem that large amount of current coming through suddenly. The problem not only causes the large amount of current extremely increase all of a sudden but also creates large amount of heat, which seriously impacts the quality and the life of the circuit. Therefore, a well-designed output circuit shall take the two major issues above into account and provide better solutions thereof.
SUMMARY OF THE INVENTION
Accordingly, it is the primary object of the present invention to provide an output circuit which is able to adjust output voltage slew rate and avoid short-circuit current.
It is another object of the present invention to provide an output circuit which is able to adjust output voltage slew rate and output current simultaneously and avoid short-circuit current.
In order to achieve the foregoing object, the present invention provides an output circuit for adjusting output voltage slew rate and avoiding short-circuit current, comprising: a control circuit, for receiving an input data and generating a first set of control signal based on the input data; a output control device for generating output signal, which is consisting of a first field effect transistor (FET) connected in series with a second field effect transistor (FET) and the point of connection is the output end; a first capacitor device which is with one end connected to a first working voltage and with another end charging/discharging to generate a first control voltage to control the gate of the first field effect transistor; a first switch for controlling charging and discharging of the first capacitor device based on the first set of control signal; a first current source for providing charging current for the first capacitor device; a second capacitor device which is with one end connected to a second working voltage and with another end charging/discharging to generate a second control voltage to control the gate of the second field effect transistor; a second switch for controlling charging and discharging of the second capacitor device based on the first set of control signal; and a second current providing charging current for the second capacitor device.
Therefore, the present invention is able to adjust the output voltage slew rate of the output circuit by controlling the time constant of the first capacitor device and the second capacitor device.
The output circuit for adjusting output voltage slew rate of the present invention further comprises a third field effect transistor (FET) and a fourth field effect transistor (FET). The gate and the drain of the third field effect transistor are connected to the gate of the first field effect transistor in order to control the output current of the first field effect transistor, and the gate and the drain of the fourth field effect transistor are connected to the gate of the second field effect transistor to control the output current of the second field effect transistor.
Therefore, in the present invention, by adjusting the aspect ratio of the first field effect transistor to the third field effect transistor and the aspect ratio of the second field effect transistor to the fourth field effect transistor, the output current of the output control device will be under controlled.
Other and further features, advantages and benefits of the invention will become apparent in the following description taken in conjunction with the following drawings. It is to be understood that the foregoing general description and following detailed description are exemplary and explanatory but are not to be restrictive of the invention. The accompanying drawings are incorporated in and constitute a part of this application and, together with the description, serve to explain the principles of the invention in general terms. Like numerals refer to like parts throughout the disclosure.
REFERENCES:
patent: 3868519 (1975-02-01), Green
patent: 5126588 (1992-06-01), Reichmeyer et al.
patent: 5128631 (1992-07-01), Feliz et al.
patent: 5317206 (1994-05-01), Hanibuchi et al.
patent: 5973512 (1999-10-01), Baker
patent: 6271699 (2001-08-01), Dowlatabadi
Realtek Semiconductor Corp.
Tran Toan
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