Output circuit for a CCD with cascode depletion MOSFET loads and

Details Output circuit for a CCD with cascode depletion MOSFET loads and Output circuit for a CCD with cascode depletion MOSFET loads and

1992-09-03

1994-01-18

Sikes, William L.

Electrical pulse counters, pulse dividers, or shift registers: c

Charge transfer device

Particular input or output means

377 59, 307530, H03K 3353

Patent

active

052805115

ABSTRACT:
Herein disclosed is an amplification circuit for realizing a substantially high sensitivity with a simple structure. The amplification circuit comprises: a first capacitor C1 for receiving a signal charge; a source-follower circuit for receiving a voltage of the first capacitor C1; an inversion amplification circuit including a source-earth type amplification MOSFET Q5 having its gate fed with the output signal of the source-follower circuit through a second capacitor C2; a feedback third capacitor C3 connected between the gate and drain of the amplification MOSFET Q5; and a switch element Q6 for feeding the gate of the amplification MOSFET Q5 with a predetermined bias voltage while the signal charge of the first capacitor C1 is being reset. The amplification MOSFET Q5 has its drain equipped as load means with a depletion type MOSFET Q4 having its gate and source connected, and the depletion type MOSFET Q4 has its source given the same potential as the substrate potential thereof.

REFERENCES:
patent: 4355244 (1982-10-01), Benoit-Gonin et al.
patent: 4488129 (1984-12-01), Benoit-Gonin et al.
patent: 4947376 (1990-08-01), Arimoto et al.
patent: 5220587 (1993-06-01), Takemoto et al.

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