Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Signal transmission integrity or spurious noise override
Patent
1994-08-02
1995-07-18
Cunningham, Terry D.
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Signal transmission integrity or spurious noise override
327108, 327188, 327391, 327436, 327437, 327534, H03K 1716
Patent
active
054345260
ABSTRACT:
The present invention relates to an output circuit and a semiconductor integrated circuit. It is an object of the present invention to cut off a passage of a current through a forward parasitic diode of a transistor connected to a power supply line and a ground line at a time of suspension of output operation of the relevant circuit, and to raise an output high level to the utmost and lower an output low level to the utmost at time of normal output operation. A complementary MOS high impedance output circuit composed of a first field effect transistor and a second field effect transistor is structured so as to include provision of a third field effect transistor for controlling one of a state of a backgate of the first field effect transistor and a state of a backgate of the second field effect transistor and also to include provision of a fourth field effect transistor for controlling one of the state of the backgate of the first and second field effect transistor complementarily to the control of the state of the backgate of the third field effect transistor.
REFERENCES:
patent: 3657575 (1972-04-01), Taniguchi et al.
patent: 4259686 (1981-03-01), Suzuki et al.
patent: 4324991 (1982-04-01), Tamaki
patent: 4368524 (1983-01-01), Nakamura
patent: 4371797 (1983-02-01), Frank
patent: 4529897 (1985-07-01), Suzuki et al.
patent: 4725813 (1988-02-01), Miyada
patent: 4728825 (1988-03-01), Sugayama et al.
patent: 5004936 (1991-04-01), Andresen
patent: 5041739 (1991-08-01), Goto
patent: 5157280 (1992-10-01), Schreck et al.
patent: 5157291 (1992-10-01), Shimoda
patent: 5172013 (1992-12-01), Matsumura
IBM Technical Disclosure Bulletin-Luckett, "Substrate Voltage Generator With Compensation For Depletion-Mode and Enhancement-Mode Field-Effect Transistors", 12/81, p. 3537.
Asami Fumitaka
Tanigashira Syouichi
Cunningham Terry D.
Fujitsu Limited
Kyushu Fujitsu Electronics Ltd.
LandOfFree
Output circuit and semiconductor integrated circuit device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Output circuit and semiconductor integrated circuit device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Output circuit and semiconductor integrated circuit device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2420241