Output circuit

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S211000, C345S212000, C345S213000

Reexamination Certificate

active

06496175

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an output circuit used in a dot inversion driving circuit or a line inversion driving circuit of a liquid crystal display apparatus or the like, and particularly to an output circuit of low power consumption and high slew rate.
2. Description of the Related Art
A liquid crystal display (LCD) apparatus is provided with driving circuits each of which applies a voltage to each pixel according to an image to be displayed. A dot inversion driving circuit of the prior art is disclosed in, for example, Japanese National Phase PCT Laid-Open Publication No. Hei 9-504389.
FIG. 1
is a block diagram showing the constitution of the dot inversion driving circuit of the prior art.
The dot inversion driving circuit of the prior art is provided with a plurality of operational amplifiers
51
. Two operational amplifiers
51
are shown in
FIG. 1. A
switching element
53
is connected to an output terminal of each of the operational amplifiers
51
. The other end of the switching element
53
serves as an output terminal of the driving circuit. Every switching element
53
receives a control signal S
51
input for the on/off control thereof. Connected to each output terminal is a panel load comprising a resistive element
54
and a capacitive element
55
.
FIG. 2
is a timing chart showing the operation of the dot inversion driving circuit of the prior art. In the dot inversion driving circuit of the prior art made in the constitution described above, a voltage is output in high impedance state when the switching element
53
is off. When the switching element
53
is on, output voltage of the operational amplifier
51
is output directly.
An operational amplifier used in the dot inversion driving circuit or the like is also disclosed (Japanese Patent Laid-open Publication No. Hei 7-221560). In the operational amplifier of the prior art described in this publication, mean power consumption is reduced by decreasing the level of direct current bias voltage and increasing the current supply when charging the capacitive load, while increasing the level of direct current bias voltage after the charging is completed.
With the driving circuit of the prior art described in Japanese National Phase PCT Laid-Open Publication No. Hei 9-504389, however, there is a problem of high overall current consumption though the power consumption can be reduced by shorting a plurality of output terminals to obtain a voltage of an intermediate level thereof. This problem is caused by the current being supplied all times to the operational amplifier.
It may appear possible to reduce the overall current consumption by replacing only the operational amplifier with that described in Japanese Patent Laid-open Publication No. Hei 7-221560. However, it results in such a problem as undesirable oscillation or ringing of the output voltage or a decrease in the slew rate.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an output circuit capable of improving the slew rate and reducing the power consumption.
According to one aspect of the present invention, an output circuit comprises an operational amplifier, a current supply circuit and an impedance changing circuit. The current supply circuit supplies current to the operational amplifiers at rising and falling of an output signal from the operational amplifier. The impedance changing circuit changes the impedance between the operational amplifier and an output terminal.
According to the aspect of the present invention, the operational amplifier is supplied with a current from the current supply circuit at the rising and falling of the output from the operational amplifier. Thus it is made possible to decrease the level of current supply to the operational amplifier to a lower limit at times other than the rising and falling of the output signal. Slew rates at the times of rise and fall of the output signal are also improved by changing the impedance between the output terminals by means of the impedance changing circuit after the rise or fall has started, thereby reducing the load on the operational amplifier.
The impedance changing circuit may have two switching elements that have different values of resistance from each other and are connected in parallel with each other between the operational amplifier and the output terminal. Resistance of one of the switching elements that has higher resistance is preferably 80 to 100 times as large as that of the other switching element of lower resistance.
The impedance changing circuit may have a transfer gate switch connected between the operational amplifier and the output terminal. In this case, the impedance changing circuit may have a control element for controlling gate voltages of two field effect transistors that constitute the transfer gate switch.
Further, a capacitive load of the liquid crystal display apparatus may also be connected to the output terminal. In this case, the output circuit is used as, for example, a dot inversion driving circuit or a line inversion driving circuit.
Furthermore, the output circuit may also have at least another set of the operational amplifier, the bias circuit and the impedance changing circuit, with a shorting circuit that short-circuits the plurality of output terminals of each set. In case the output circuit is used as a dot inversion driving circuit, power consumption can be reduced further through short-circuiting of the output terminals thereby to obtain a voltage of an intermediate level thereof.
The nature, principle and utility of the invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings in which like parts are designated by like reference numerals or characters.


REFERENCES:
patent: 4899113 (1990-02-01), Buikema
patent: 5283477 (1994-02-01), Shibata
patent: 5455534 (1995-10-01), Motegi et al.
patent: 5528256 (1996-06-01), Erhart et al.
patent: 6028598 (2000-02-01), Suyama et al.
patent: 6232948 (2001-05-01), Tsuchi
patent: 7-221560 (1995-08-01), None
patent: 9-504389 (1997-04-01), None
patent: 87-1707 (1987-03-01), None
patent: 89-1217 (1989-03-01), None

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