Output buffer with ground bounce control

Details Output buffer with ground bounce control Output buffer with ground bounce control

1989-02-10

1990-09-25

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307448, 307473, 307594, 307596, H03K 313, H03K 513, H03K 1728, H03K 17687

Patent

active

049595652

ABSTRACT:
A novel output buffer is described which includes a plurality of pull up transistors connected in parallel and/or a plurality of pull down transistors connected in parallel. A desired amount of resistance is included in the path connecting the gates of the pull up transistors, and in the path connecting the gates of the pull down transistors, thereby providing a distributed RC network causing pull up and pull down transistors to turn on in sequence. This is designed to keep the rate of change of the pull up and pull down current constant, thus reducing ground and Vcc bounce. In another embodiment, a single pull up transistor and/or a single pull down transistor is used. The single transistors have a relatively high gate resistance such that along the channel width of the transistor, the gate capacitance and the gate resistance operates as a distributed RC network. In this manner, portions of the channel begin conducting sequentially, as is the case where a plurality of pull up and pull down transistors are used.

REFERENCES:
patent: 4725747 (1988-02-01), Stein et al.
patent: 4789793 (1988-12-01), Ehni et al.
patent: 4820942 (1989-04-01), Chan
patent: 4885485 (1989-12-01), Leake et al.

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