Output buffer with ground bounce compensation

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307475, 307451, 307473, H03K 1716, H03K 19092

Patent

active

052967581

ABSTRACT:
A ground bounce compensating output buffer for an integrated circuit is disclosed. The circuit includes a pull-up transistor, the gate of the pull-up transistor is coupled to an input line, the output of the pull-up transistor is coupled to an output line. The pull-up transistor discharges current to ground during a state transition. The discharge of current to ground creates ground bounce due to the resistance and inductance of the package lead. A pull-down transistor is also provided. The gate of the pull-down transistor is also coupled to the input line, the output of the pull-down transistor is also coupled to the output line. The pull-down transistor also discharges current to ground during a state transition and thereby produces ground bounce. To reduce the ground bounce, the disclosed circuit includes compensating devices positioned between the input line and the gate of the pull-down transistor. The first compensating device includes a mechanism for regulating drive current to the pull-down transistor in the presence of ground bounce. A second compensating device limits voltage to the first compensating device in the presence of ground bounce. As a result, the second compensating device further regulates drive current to the pull-down transistor during ground bounce. A third compensating device generates a constant drive current to the pull-down transistor in the presence of ground bounce. The design of the circuit provides optimal signal delays to minimize totem pole current which would otherwise produce additional ground bounce.

REFERENCES:
patent: 4918339 (1990-04-01), Shigeo et al.
patent: 4947063 (1990-08-01), O'Shaughnessy et al.
patent: 4959561 (1990-09-01), McDermott et al.
patent: 5028817 (1991-07-01), Patil
patent: 5216299 (1993-06-01), Wanlass

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