Output buffer with digitally controlled power handling character

Details Output buffer with digitally controlled power handling character Output buffer with digitally controlled power handling character

1994-07-15

1997-05-20

Lim, Krisna

395883, G06F 1310

Patent

active

056320191

ABSTRACT:
A programmable output buffer has source/sink characteristics that may be programmed to match the capacitive load to be driven. The programmable output buffer comprises a plurality of individually-enableable unit buffers, and a programmable unit buffer driver control logic. By programming the control logic to enable only such unit buffers whose current handling contributions are necessary to drive the output buffer load capacitance, current spiking can be minimized. The unit buffers preferably are scaled so each can source or sink a different magnitude current relative to the other unit buffers, a range of output buffer current may be programmed in discrete current steps. The control logic preferably includes elements that delay delivery of an enabling signal to various of the unit buffers. In a cascade-up mode, the control logic sequentially delays enabling signals so that various of the required unit buffers are enabled sequentially, to minimize problems associated with current spiking. In a cascade-down mode, the unit buffers are simultaneously enabled but are sequentially disabled. A mode encompassing cascade-up and cascade-down mode operation is provided, as is a mode wherein the sequence of cascade-on and/or cascade-off enabling signals is retriggered for every data change. This mode permits changing data in the buffer without creating current spikes that would result if the data were changed while the unit buffers were enabled.

REFERENCES:
patent: 5157282 (1992-10-01), Ong et al.
patent: 5261057 (1993-11-01), Coyle et al.

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