Output buffer type ATM exchange device and multicast control...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Details

C370S417000, C370S432000

Reexamination Certificate

active

06775287

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an output buffer type ATM (Asynchronous Transfer Mode) device and a multicast control method which have multicast function for outputting cell inputted from a certain input port to a plurality of output ports.
DESCRIPTION OF THE PRIOR ART
A transmission mode such as asynchronous transfer mode (ATM) converts various kinds of information such as voice, image, data and so forth into cell to be a fixed length packet to execute switching in high speed. When the cell undergoes routing for one outgoing line from a plurality of incoming lines of the switching device, collision of the cell may occur, resulting in disappearance of the cell. It is necessary to prevent disappearance of the cell caused by collision. In order to prevent disappearance of the cell, there is proposed the switching device and/or the switching method having a buffer storing therein the cell temporarily. As one of them, there is an output buffer type ATM exchange device. The output buffer type ATM switching device is provided with buffer in every outgoing line at a rear stage of a switch.
The output buffer type ATM exchange device is provided with a plurality of input ports and a plurality of output ports. In the case where, the cell undergoes routing from a plurality of input ports to one output port, it causes a plurality of the cells to be stored in to the buffer prepared in every respective output ports temporarily. For that reason, it is capable of avoiding disappearance of the cell caused by instantaneous collision.
On the other hand, in such the switching device, not only there is provided a connection (uni-cast) for causing the cell inputted from a certain input port to be outputted to only certain one output port, not only there is provided a multicast function for outputting the cell inputted from a certain input port to a plurality of output ports.
FIG. 1
is a block diagram explaining the multicast control method of the conventional output buffer type ATM exchange device. Here, there is shown the case where there exists four input ports and four output ports respectively.
In
FIG. 1
, the output buffer type switching device connects respective input ports
700
to
703
with a cell multiplex circuit
71
, the cell multiplex circuit
71
with a time division multiplex bus
72
, the time division multiplex bus
72
with respective address filters
730
to
733
, the respective address filters
730
to
733
with respective output buffers
740
to
743
, and the respective output buffers
740
to
743
with respective output ports
750
to
753
successively. Further, the output buffer type switching device connects the cell multiplex circuit
71
with a bit map table
76
, and the bit map table
76
with the respective address filters
730
to
733
.
There is described operation of the output buffer type ATM exchange device. The cell multiplex circuit
71
inputs therein the cell from the input ports
700
to
703
. The cell multiplex circuit
71
multiplexes the cells from the whole input ports during the time period (hereinafter referred to as input cell period) when the respective input ports transfer one cell.
FIG. 2A
shows about cell multiplex from the respective input ports in the cell multiplex circuit
71
. The cell multiplex circuit
71
repeats this operation in every input cell period.
Further, the cell multiplex circuit
71
multiplexes the cell received from the respective input ports, before monitoring a multicast cell display bit
23
(constitution of ATM cell is shown in
FIG. 2
, and so on) within the cell. In case of the cell whose present bit indicates “0”, namely, in the case of uni-cast cell, it causes multiplexed cell to be outputted to the time division multiplex bus
72
as it is. On the other hand, a cell is a cell whose multicast cell display bit indicates “1”, namely, on the occasion that the cell is the multicast cell, it causes the bit map table
70
to be retrieved while taking a multicast connection number
24
from among the multicast cells as address. The multiple output port information obtained is informed to corresponding address filter. The multicast cell undergone retrieval by the bit map table
76
is outputted to the time division multiplex bus
72
. Further, when the number of the input port is “m”, the cell multiplex circuit
71
is required to operate in the speed more than “m” times of the speed of the respective input ports. According to
FIG. 1
, the constitution is that the number of the input port is four, therefore, the cell multiplex circuit is required to operate in the speed more than four times of the speed of the input port.
The time division multiplex bus
72
distributes the cell inputted from the cell multiplex circuit
71
among the address filters
730
to
733
in every respective output ports. The address filters
730
to
733
monitors the multicast cell display bit
23
and the output port number
22
concerning the inputted cell. When the multicast cell display bit is “0”, namely the cell is uni-cast cell, it causes the cell that the output port number agrees with the own port address which the respective address filters have to be picked, before outputting to corresponding output buffers
740
to
743
. Further, the address filters
730
to
733
, when the multicast cell display bit is “1”, namely, the multicast cell is inputted, it causes the bit map table
76
to be retrieved according to the multicast connection number
24
of among the multicast cell, thus picking the cell about only the port whose obtained output port information indicates “1”, before outputting to the corresponding output buffers
740
to
743
. The output buffers
740
to
743
accumulates the cell outputted from corresponding address filters
730
to
733
. Subsequently, it causes the cell to be outputted while adjusting it to the output port speed in order from the cell which is accumulated in the most earliest order.
For instance, on the supposition that the cell
20
d
shown in
FIG. 6D
from the input port
700
. On this occasion, on the supposition that the establishment shown in
FIG. 5B
is implemented with respect to the bit map table
76
for the sake of the routing of the multicast cell. The cell multiplex circuit
71
multiplexes the cell inputted from the input port
700
. Simultaneously, since the multicast cell display bit
23
is “1” within these cells, it causes the multicast connection number
24
(=1) within these cells to be outputted to the bit map table
76
, before retrieving the multicast output information. The bit map table
76
informs corresponding address filters
731
,
732
, and
733
to the multicast outputs ports
1
,
2
, and
3
indicating “1” in the multicast connection number
1
about the multicast output port information.
Next, the cell
20
d
which is multiplexed in the cell multiplex circuit
71
is distributed among the whole address filters
730
to
733
through the time division multiplex bus
72
. The multicast cell display bit
23
of the input cell is “1”. The corresponding address filters
731
,
732
, and
733
to multicast output port information are informed by the bit map table
76
. Only the address filters
731
,
732
, and
733
of the address filters
730
to
733
pick the cell. The cell
20
d
picked by the address filters
731
,
732
,
733
is rewritten in the rear stage of output buffers
741
,
742
,
743
respectively. In respective output buffer, when the cell rewritten previously is consumed, before being outputted to respective output ports
751
,
752
, and
753
. Thus, it is capable of performing multicast output of the cell
20
d
inputted from one input port to three output ports.
However, there are following problems about the multicast control method of the conventional output buffer type ATM switching method.
The problem is that very high speed retrieval processing is required with respect to the bit map table storing therein the output port of the multicast cell. The retrieval processing for the bit map table, on the suppo

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