Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1988-09-19
1989-10-31
Miller, Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307452, 307555, 307568, 307585, H03K 19017, H03K 19096, H03K 1704, H03K 17687
Patent
active
048779784
ABSTRACT:
The invention pertains to an output buffer circuit capable of switching from the off state to the on state, and from the on state to the off state, without generating significant noise. The circuit includes an MOS inverter circuit having a first node adapted to be connected to one terminal of a power supply and a second node adapted to be connected to the other node, and having an input for receiving an input signal and an output for providing an output signal adapted to be connected to an output transistor. The circuit also has a first MOS transistor of one polarity type and one mode having its source-drain circuit coupled in series with the first node of the inverter circuit, and a second MOS transistor opposite in either polarity type or mode from the first MOS transistor, having its source-drain circuit coupled in series with the other node of the inverter circuit. A first reference voltage is supplied to the gate of the first MOS transistor and a second mirrored reference voltage is supplied to the gate of the second MOS transistor. These reference voltages are capable of generating a stable current over normal variations in operating and processing conditions, whereby the rise and fall times of the output signal from the inverter circuit are precisely controlled, irrespective of normal changes in operating or processing conditions of the MOS transistor in the circuit, thereby reducing noise when the output transistor connected to the output is turned on or off.
REFERENCES:
patent: 3737673 (1973-05-01), Suzuki
patent: 3973139 (1976-08-01), Dingwall
patent: 4217502 (1980-08-01), Suzuki et al.
patent: 4329600 (1982-05-01), Stewart
patent: 4585958 (1986-04-01), Chung et al.
patent: 4678943 (1987-07-01), Uragami et al.
patent: 4723108 (1988-02-01), Murphy et al.
Bertelson David R.
Cypress Semiconductor
Miller Stanley D.
LandOfFree
Output buffer tri-state noise reduction circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Output buffer tri-state noise reduction circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Output buffer tri-state noise reduction circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-627639