Output buffer having reduced electric field degradation

Details Output buffer having reduced electric field degradation Output buffer having reduced electric field degradation

1988-11-01

1990-04-24

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072968, 307300, 307443, 307451, 307585, H03K 1704, H03K 1706, H03K 17687, H03K 19003

Patent

active

049202871

ABSTRACT:
A digital circuit with a 5 V power supply voltage in which NMOS transistors constructed in sub-micron technology are protected against excessive field strengths by means of additional transistors in order to prevent so-called "hot carrier stress" for this purpose the additional transistors have a greater channel length and/or a higher threshold voltage.

REFERENCES:
patent: 4100438 (1978-07-01), Yokoyama
patent: 4521698 (1985-06-01), Taylor
patent: 4704547 (1987-11-01), Kirsch
Dingwall, "Improved COS/MOS Inverter Circuit for Reducing Burnout and latch-up", RCA Tech. Notes, TN-1230, pp. 1-4, 7-25-79.

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