Output buffer having high resistance against electrostatic break

Details Output buffer having high resistance against electrostatic break Output buffer having high resistance against electrostatic break

1992-04-14

1994-01-04

Ng, Jin F.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307585, H03K 17687

Patent

active

052763714

ABSTRACT:
An output buffer has a series circuit connected between a first and a second power supply terminal, which circuit is formed by a first n-channel MOSFET whose gate receives a first output data control signal and a second n-channel MOSFET whose gate receives a second output data control signal. The output buffer further has a third N-channel MOSFET connected between a bonding pad and a common junction node defined by the first and second N-channel MOSFETs. The third N-channel MOSFET has a gate connected to the first power supply terminal so that it is controlled to be always in a conductive state. The output buffer is effectively increased or enhanced in its resistance against electrostatic breakdown.

REFERENCES:
patent: 4647798 (1987-03-01), Crafts et al.
patent: 4733111 (1988-03-01), Fassino et al.
patent: 4958091 (1990-09-01), Roberts

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