Output buffer for reducing switching noise

Details Output buffer for reducing switching noise Output buffer for reducing switching noise

1998-08-19

2000-05-09

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327112, 327320, 327328, 326 27, H03K 1716, H03K 17687

Patent

active

060609389

ABSTRACT:
An output buffer for reducing the signal noise associated with the switching between logic high and logic low electrical. Signals includes a first clamping circuit linked to the pull-up output transistor of the buffer, and a second clamping circuit linked to the pull-down output transistor of the buffer. The buffer may include both clamping circuits or either the first or second clamping circuit alone, dependent upon signal shaping interests. Each of the clamping circuits includes a selectable delay stage coupled to the buffer's input, a current regulator controlled by the delay stage, and a clamping device that is coupled to the control node of the output transistor. When the current regulator is conducting, the control node of the output transistor is clamped at a potential near its threshold turn-on. As a result, when the clamping circuit is turned off, the output transistor experiences a soft turn-on, thereby reducing signal bounce and the associated noise.

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