Output buffer circuits for reducing noise

Details Output buffer circuits for reducing noise Output buffer circuits for reducing noise

1989-10-27

1991-09-24

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307451, 307263, 307473, 307542, H03K 19092, H03K 19003, H03K 19094, H03K 1716

Patent

active

050516256

ABSTRACT:
An output buffer circuit, in which a pair of current sources is connected to positive and negative power sources, and a first inverter having input and output terminals, is arranged between the current sources, in which a second inverter having input and output terminals, is connected to the output terminal of the first inverter, the second inverter including at least one of P-channel and N-channel MOSFETs, and a capacitor is connected between the input and output terminals of the second inverter.

REFERENCES:
patent: 4074151 (1978-02-01), Buckley, III et al.
patent: 4521701 (1985-06-01), Reddy
patent: 4752703 (1988-06-01), Lin
patent: 4906871 (1990-03-01), Iida
patent: 4916337 (1990-04-01), Leung et al.
patent: 4939392 (1990-06-01), Shubat et al.

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