Output buffer circuit with noise reduction circuit

Details Output buffer circuit with noise reduction circuit Output buffer circuit with noise reduction circuit

1992-08-19

1993-12-07

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 3074821, H03K 1716, H03K 19092

Patent

active

052685977

ABSTRACT:
An output buffer circuit, which reduces its switching speed in response to the operation of a neighboring output buffer circuit, is presented. The output buffer circuit has a pair of drive transistors which switch complementarily in responsive to an input signal to the buffer circuit. In normal operation, each of the drive transistors is driven by a speed-up block for high-speed switching. When a similar drive transistor of a neighboring output buffer circuit is also switching, the speed-up block is switched off so that the drive transistor of the first output buffer circuit switches in a slower mode to avoid noise generation. The noise reduction connection between output buffer circuits is in the form of a daisy chain.

REFERENCES:
patent: 4587445 (1986-05-01), Kanuma
patent: 4843262 (1989-06-01), Abe
patent: 4975598 (1990-12-01), Borkar
patent: 5095231 (1992-03-01), Sartori et al.
patent: 5118971 (1992-06-01), Schenck

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