Output buffer circuit for transferring a high speed signal betwe

Details Output buffer circuit for transferring a high speed signal betwe Output buffer circuit for transferring a high speed signal betwe

1998-09-30

1999-11-02

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

327176, 327 35, H03K 3017, H03K 504, H03K 708

Patent

active

059778075

ABSTRACT:
An output buffer circuit for transferring a high speed signal between large scale integrated circuits includes a first inverter with first and second transistors of opposite conductivity type, a second inverter with third and fourth transistors of opposite conductivity type, and a switch circuit for controlling the gates of the first and second transistors in accordance with a test control signal so as to change a dividing power. The respective outputs of the first and second inverters are connected in common to an output signal having a predetermined signal level related to an input signal. The circuit includes a duty ratio adjusting circuit which controls the respective gates of the first and second transistors to substantially equalize the first delay time until the output signal changes from a first level to a second level in response to a transition of the input signal, and a second delay time until the output signal changes from the second level to the first level in response to a transition of the input signal. The output buffer circuit maintains the duty ratio at about 50%.

REFERENCES:
patent: 5121013 (1992-06-01), Chuang et al.
patent: 5319258 (1994-06-01), Ruetz
patent: 5568044 (1996-10-01), Bittner
patent: 5675273 (1997-10-01), Masleid
patent: 5841305 (1998-11-01), Wilson

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