Output buffer circuit for integrated circuit

Details Output buffer circuit for integrated circuit Output buffer circuit for integrated circuit

1993-12-27

1995-05-09

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Slope control of leading or trailing edge of rectangular or...

327380, 327389, 326 27, 326 57, H03K 512, H03K 1716

Patent

active

054143799

ABSTRACT:
An output buffer circuit for an integrated circuit comprising first and second NAND gates and first and second output drive transistors. The first NAND gate inputs a first input signal and a first control signal and the second NAND gate inputs a second input signal and the first control signal. Also, the output buffer circuit comprises a first inversion part for inverting an output signal from the first NAND gate in response to the first control signal and a second control signal, a second inversion part for inverting an output signal from the second NAND gate in response to the first and second control signals, a third transistor having a gate connected to a third control signal, a fourth transistor having a source connected to the third transistor and a gate and a drain connected in common to an output terminal of the first NAND gate, a fifth transistor having a source connected to a ground voltage and a gate connected to a fourth control signal, a sixth transistor having a gate connected to the third control signal, a seventh transistor having a source connected to the sixth transistor and a gate and a drain connected in common to an output terminal of the second NAND gate, and an eighth transistor having a source connected to the ground voltage and a gate connected to the fourth control signal.

REFERENCES:
patent: 4877978 (1989-10-01), Platt
patent: 5013940 (1991-05-01), Ansel
patent: 5214320 (1993-05-01), Truong
patent: 5315172 (1994-05-01), Reddy
patent: 5315173 (1994-05-01), Lee et al.

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