Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1987-06-01
1988-10-04
Heyman, John S.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307200B, 307450, 307451, 307530, 307572, H03K 19017, H03K 19094, H03K 17687
Patent
active
047758090
ABSTRACT:
This invention relates to an output buffer circuit that improves the electrostatic sustenance. In the circuit construction of the present invention there are provided dummy MOS transistors that are connected to an output terminal in parallel with the standard MOS transistors for an output buffer, and which are not connected to an input terminal. Due to circuit construction, the dummy transistors increase the capacity of the buffer circuit and an output buffer circuit which has high electrostatic breakdown can be obtained.
REFERENCES:
patent: 4459494 (1984-07-01), Takakura
patent: 4687955 (1987-08-01), Koinuma
IBM Tech. Disc. Bul., "Power Dissipation Reduction Logic Circuitry", McCullough.
IEEE Journal of Solid State Circuits, "BiMOS Micropower IC's".
"Optimized ESD Protection Circuits for High Speed MOS/VLSI by Fujishin et al., 1985 IEEE Journal of Solid-State Circuits SC-20 Apr., No. 2, pp. 594-596.
Japanese Abstract application 59-78561, vol. 10, No. 79, E-391, 2136 of Mar. 28, 1986.
Japanese Abstract No. 58-119079, vol. 9, Nol 123, E-317, 1846, May 28, 1985.
Heyman John S.
Sony Corporation
Wambach M. R.
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