Output buffer circuit

Details Output buffer circuit Output buffer circuit

1992-04-29

1994-06-14

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307584, 307542, H03K 17687

Patent

active

053213262

ABSTRACT:
An output buffer circuit includes a first output buffer having a high output resistance determined by DC specifications, a second output buffer having an output resistance satisfying AC specifications when simultaneously driven with the first output buffer, and a control circuit for controlling an operation of the second output buffer. An input signal is supplied to the input node of the first output buffer, and the output node of the first output buffer is connected to an output terminal. The output node of the second output buffer is connected to the output terminal. The control circuit is responsive to the potential of the input signal or of the output terminal to control the operation of the second output buffer. The control circuit drives the second output buffer when the output from the first output buffer is changed, and sets the output from the second output buffer in the high impedance state when the output from the first output buffer is stationary.

REFERENCES:
patent: 4678943 (1987-07-01), Uragami et al.
patent: 4731553 (1988-03-01), Van Lehn et al.
patent: 4806794 (1989-02-01), Walters, Jr.
patent: 4820942 (1989-04-01), Chan
patent: 4829199 (1989-05-01), Prater
patent: 4928023 (1990-05-01), Marshall
patent: 5028818 (1991-07-01), Go Ang et al.
patent: 5057711 (1991-10-01), Lee et al.
patent: 5063308 (1991-11-01), Borkar
patent: 5166555 (1992-11-01), Kano
Vol. 31 No. 5 Oct. 1988 IBM Technical Disclosure Bulletin, pp. 331-332.

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