Output buffer circuit

Details Output buffer circuit Output buffer circuit

1996-05-16

1998-10-27

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327391, 327333, H03K 1716

Patent

active

058282602

ABSTRACT:
A detecting penetration current causing logic part (12a) gives, when the logic is H level at both nodes (N15, N24), the logical product thereof H to a condition adding part (12b) as an activated detection signal. In the condition adding part (12b), it is confirmed that the activation of the detection signal is longer than a specified time, by a delay circuit (G21) and NAND gate (G22). Consequently, logic H is given to a forced logic presenting part (12c). In the forced logic presenting part (12c), NMOS transistors (Q13, Q14) are turned on, and logic L is given by force to both nodes (N15, N24) to get out of a state where a current would flow.

REFERENCES:
patent: 4506164 (1985-03-01), Higuchi
patent: 4591745 (1986-05-01), Shen
patent: 5422592 (1995-06-01), Asahina
patent: 5650742 (1997-07-01), Hirano

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