Outline compensation circuit

Computer graphics processing and selective visual display system – Display driving control circuitry – Controlling the condition of display elements

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395141, 345144, G06F 1520

Patent

active

052747565

ABSTRACT:
An outline compensation circuit comprising: a first coefficient multiplier for reducing a level of an image signal by one half and reversing the polarity thereof; a first delay circuit for delaying by 2.tau. the signal from the first coefficient multiplier; a first adder for adding the signal from the first delay circuit to the image signal; a second delay circuit for delaying the signal from the first adder by 2.tau.; a second adder for adding the signal delayed by the second delay circuit to the signal from the first coefficient multiplier to output a second-order differential signal of the image signal; a first non-linear converter for calculating the square root of the second-order differential signal from the second adder; a subtractor for subtracting the signal from the first delay circuit from the signal from the first coefficient multiplier to output a first-order differential signal of the image signal; an absolute value calculating circuit for calculating the absolute value of the first-order differential signal from the subtractor; a third delay circuit for delaying the signal from the absolute value calculating circuit by .tau.; a second non-linear converter for calculating the square root of the signal from the third delay circuit; and a multiplier for multiplying the signal from the second non-linear converter with the signal from the non-linear converter to output an outline compensation signal, whereby outline compensation can be carried out naturally.

REFERENCES:
patent: 5047954 (1991-09-01), Corona et al.
patent: 5086482 (1992-02-01), Kumagai
patent: 5136689 (1992-08-01), Waller
"A Digital Contour-Corrector For A High-Definition TV Camera" Okada, NHK Science and Technical Research Laboratories, Jan. 1985, pp. 2-15.

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