Outer lead for a semiconductor IC package and a method of fabric

Details Outer lead for a semiconductor IC package and a method of fabric Outer lead for a semiconductor IC package and a method of fabric

1995-05-31

1997-09-16

Picardat, Kevin

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

H01L 2160

Patent

active

056680600

ABSTRACT:
An outer lead having a plurality of external leads 1 for electrically connecting the semiconductor IC of a semiconductor IC package to external devices comprises a base plate 11, a plated base structure formed over the surface of the base plate 11 and consisting of a plurality of plated base layers 12, 13 and 14 of Ni or a Ni alloy, and a surface layer 15 of Au or an Au alloy formed over the uppermost plated base layer 14 of the plated base structure. The number of the plated base layers is at least three. Each plated base layer 12, 13 and 14 of the plated base structure is subjected to crystal-growth annealing after being formed by plating to crystal-grow the grains thereof. A method of fabricating such an outer lead is provided.

REFERENCES:
patent: 5010388 (1991-04-01), Sasame et al.
patent: 5221428 (1993-06-01), Ohsawa et al.
patent: 5354422 (1994-10-01), Kato et al.

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