Outer coating substrate for electronic component and...

Electrical generator or motor structure – Non-dynamoelectric – Piezoelectric elements and devices

Reexamination Certificate

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C310S348000, C310S358000

Reexamination Certificate

active

06448696

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to outer coating substrates for electronic components, for example, piezoelectric oscillators, and piezoelectric resonant components including the outer coating substrates. In particular, the present invention relates to outer coating substrates for electronic components which are constituted by laminating various material layers, and piezoelectric resonant components using the outer coating substrates.
2. Description of the Related Art
In electronic components, for example, piezoelectric oscillators, outer coating substrates made of ceramics have been widely used to protect electronic component elements.
For example, a piezoelectric resonator
101
shown in
FIG. 10
is disclosed in Japanese Unexamined Patent Application Publication No.4-4604. In the piezoelectric resonator
101
, outer coating substrates
103
and
104
are laminated on the top and bottom of an energy trap piezoelectric resonant element
102
. The outer coating substrates
103
and
104
are made of alumina obtained by low temperature calcining. Ceramics, for example, alumina, is superior in strength. However, manufacturing costs are high due to high calcining temperatures. It is disclosed in Japanese Unexamined Patent Application Publication No.4-4604 that the calcining temperatures are lowered to reduce the manufacturing costs.
On the other hand, a crystal oscillator shown in
FIG. 11
is disclosed in Japanese Unexamined Patent Application Publication No.9-208261. In this disclosure, the crystal oscillator
112
is sealed in a package composed of a base member
113
and a cap member
114
. The base member
113
and the cap member
114
are made of a glass-ceramics composite so that calcining at a low temperature of about 800° C. to 1000° C. is described as being possible.
Furthermore, a composite layer ceramic component shown in
FIG. 12
is disclosed in Japanese Unexamined Patent Application Publication No. 10-106880. In this disclosure, low dielectric constant layers
121
and
124
are arranged as outermost layers, and the low dielectric constant layers
121
and
124
are made of a mixed material of ceramic powder and amorphous glass. High dielectric constant layers
122
and
123
are arranged between the low dielectric constant layers
121
and
124
. It is described that characteristics of capacitors, resonators, and other electronic components, which include conductor layers
125
and
126
, are improved by the high dielectric constant layers
122
and
123
.
The outer coating substrates
103
and
104
of the piezoelectric resonator described in Japanese Unexamined Patent Application Publication No.4-4604 can be calcined at a relatively low temperature. However, the contraction rate during calcination is large. Therefore, it has been a problem that the dimensional precision of the outer coating substrates
103
and
104
is insufficient.
On the other hand, a glass-ceramics composite is used in the structure described in Japanese Unexamined Patent Application Publication No.9-208261 and in Japanese Unexamined Patent Application Publication No.10-106880. The glass-ceramics composite can be calcined at a low temperature. However, the contraction rate during calcination is large also, and the precision of substrate dimension has been insufficient.
SUMMARY OF THE INVENTION
In order to overcome the problems described above, preferred embodiments of the present invention provide an outer coating substrate for an electronic component that is arranged to be calcined at a low temperature, and to achieve greatly improved dimensional precision. In addition, preferred embodiments of the present invention provide a piezoelectric resonant component having an outer coating substrate that is arranged to be calcined at a low temperature and is superior in dimensional precision, while also being low cost.
According to a first preferred embodiment of the present invention, an outer coating substrate for an electronic component includes a multi-layered substrate having a first material layer and a second material layer laminated together, wherein the first material layer is sintered in a liquid phase and the second material layer is not sintered at the sintering temperature of the first material layer.
In one preferred embodiment of the present invention, the first material layer is preferably made of glass or glass-ceramics.
It is also preferable that the first material layer does not contain a component that dissolves into a wet plating bath.
Also, a concave portion is preferably formed on at least one major surface of the substrate.
The outer coating substrate preferably has at least one pair of capacitive electrodes, arranged to interpose at least a portion of the second material layer, and a capacitor is defined by the pair of capacitive electrodes.
In other preferred embodiment of the present invention, a resistive element and an inductance element are preferably provided in the outer coating substrate and are made of a resistive material and a magnetic material.
In another preferred embodiment of the present invention, at least two layers of the first material layer are laminated with the second material layer in the substrate.
According to another preferred embodiment of the present invention, a piezoelectric resonant component includes a piezoelectric resonant element and first and second outer coating substrates laminated on the top and bottom of the piezoelectric resonant element, wherein at least one of the first and second outer coating substrates includes a multi-layered substrate having a laminate structure having a first material layer that is sintered in a liquid phase and a second material layer that is not sintered at the sintering temperature of the first material layer.
In one specific example of the preferred embodiment described in the preceding paragraph, the piezoelectric resonant element is an energy trap piezoelectric resonant element, and the first and second outer coating substrates are laminated on the piezoelectric resonant element so as to define a space that allows for free and unhindered vibration of resonant portion of the energy trap piezoelectric resonant element.
In another preferred embodiment of the present invention, a concave portion is preferably provided on a surface of at least one of the first and second outer coating substrates, so as to define a space that allows for free and unhindered vibration of resonant portion of the energy trap piezoelectric resonant element.
It is preferred that the first material layer is made of glass or glass-ceramics in this preferred embodiment of the present invention.
It is also preferred that the first and second outer coating substrates do not contain a component that dissolves into a wet plating bath.
In at least one of the first and second outer coating substrates, at least one pair of capacitive electrodes is arranged to interpose at least a portion of the first material layer, and a capacitor is defined by the pair of capacitive electrodes.
Also, in at least one of the first and second outer coating substrates, a resistive element and an inductance element are preferably provided and include a resistive material and a magnetic material, respectively.
In addition, at least one of the first and second outer coating substrates preferably has a plurality of the first material layers.
According to various preferred embodiments of the present invention, a piezoelectric resonant component includes a package substrate, a piezoelectric resonant element fixed on the package substrate, and a junction member fixing the piezoelectric resonant element to the package substrate, wherein the Young's modulus of the package substrate is less than a Young's modulus of a piezoelectric material constituting the piezoelectric resonant element.
In such a preferred embodiment of the present invention, the package substrate is preferably a multi-layered package substrate having at least two layers.
The multi-layered package substrate preferably includes a first laye

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