Oscillators – With distributed parameter resonator – Parallel wire type
Reexamination Certificate
2002-11-20
2004-06-15
Chang, Joseph (Department: 2817)
Oscillators
With distributed parameter resonator
Parallel wire type
C331S1170FE, C331S074000
Reexamination Certificate
active
06750726
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an integrated circuit design. More particularly, the present invention relates to an oscillator circuit and a method for operating the same.
BACKGROUND OF THE INVENTION
Frequency synthesizers are commonly used in modem integrated circuits (ICs) to generate high frequency outputs that are used to frequency-modulate a desired signal. A frequency synthesizer typically includes a reference clock, a phase detector, a loop filter, a frequency divider, and a voltage-controlled oscillator (VCO). Among them, the VCO tends to dominate the critical performance metric of phase noise.
FIG. 1
schematically illustrates a conventional “cross-coupled” VCO
10
. The operation of this type of cross-coupled oscillator depends on the regeneration loops (positive feedback loops) formed with active devices M
0
and M
1
. This type of VCO is easy to implement, and oscillation is guaranteed so long as the loop gain is greater than one. In addition, the VCO
10
generates differential outputs that are insensitive to common mode noise, and a range of oscillation frequencies can be tuned by simply changing the common node voltage (A) of the varactors of the L-C tank. Therefore, cross-coupled oscillators are widely implemented in radio-frequency integrated circuits (RFIC).
The performance of an oscillator is quantified largely by its phase noise. The major sources contributing to phase noise include both the thermal noise from the L-C tank and the noise from the active devices M
0
and M
1
. Unlike the L-C tank, the noise from the active devices includes not only the thermal noise, but also flicker noise which presents the greatest impact on phase noise. If only thermal noise were present from both the active devices and the L-C tank, the phase noise is shaped by the second-order response of the L-C tank, resulting in a −20 dB/decade slope in phase noise away from the carrier frequency, as shown in FIG.
2
. However, flicker noise, which increases roughly on the order of 1/f above the thermal noise floor, contributes noise over a wide range of frequencies ranging from zero to hundreds of KHz in every metal oxide semiconductor (MOS) device. Although the flicker noise itself has a low frequency, it is the fundamental fact that the low-frequency noise components are upconverted around the center frequency (f
0
) of the oscillator. Therefore, combining both thermal and flicker noises, a strong −30 dB/decade phase noise curve appears near the carrier frequency (f
0
), and the noise curve eventually falls back to the 20 dB/decade slope due to the disappearance of flicker noise at frequencies far away from the oscillation frequency.
The breakpoint from −20 dB/decade rolloff and −30 dB/decade rolloff varies depending on the semiconductor process of the active devices. Furthermore, even for a given process technology such as 0.18 &mgr;m at a same fab, the device 1/f parameters change across several manufacturing lots and/or runs, which in turns leads to change in thermal and flicker noise breakpoint. In summary, the flicker noise of the active devices in the oscillator causes higher close-in phase noise that varies dramatically over different processes.
One possible solution to the flicker noise problem is to make the frequency synthesis loop wideband, since a wider loop filter bandwidth in the phase-locked loop may be able to reduce close-in phase noise at output. However, it would be extremely difficult to arbitrarily widen the loop bandwidth due to limitations in loop stability, loop accuracy, acquisition time, parasitic spur suppression, and the like. Therefore, there are some approaches provide low close-in phase noise by reducing the up-converted flicker noise from the active regeneration devices.
One conventional approach is to modify the VCO circuit by adding a pair of PMOS load and reducing the up-converted flicker noise from both NMOS and PMOS pairs. It has been shown that, assuming the rise-fall times in the loop are balanced, 1/f noise upconversion can be suppressed. Balancing the rise-fall times is tantamount to matching the drive strengths of the NMOS and PMOS devices.
However, balancing the rise-fall times over process and temperature has major disadvantage to this topology. Across process, it is highly unlikely to achieve perfectly balanced switching waveforms. Furthermore, any residual imbalance will result in some upconversion of 1/f noise—the fact that this solution also introduces another pair of PMOS devices makes its intrinsic 1/f noise substantially greater, and hence exacerbates the rise-fall balance requirements.
Therefore, it would be desirable to provide a VCO having intrinsically low close-in phase noise.
BRIEF DESCRIPTION OF THE INVENTION
An oscillator circuit includes an electrical load, a first metal oxide semiconductor (MOS) device, a second MOS device, and a negative feedback circuit. The electrical load is coupled between a first node and a second node. The first node outputs a first oscillating voltage having a first peak voltage, and the second node outputs a second oscillating voltage having a second peak voltage. The first MOS device is coupled between the first node and a third node, and controls a first current flowing from the first node to the third node. The second MOS device is coupled between the second node and a fourth node, and controls a second current flowing from the second node to the fourth node. A positive feedback circuit is formed with the first and second MOS devices. The positive feedback circuit has inputs from the first and second nodes and outputs to the first and second MOS devices. The negative feedback circuit has inputs from the third and fourth nodes and outputs to the first and second MOS devices.
REFERENCES:
patent: 4661785 (1987-04-01), Benjaminson
patent: 6064277 (2000-05-01), Gilbert
patent: 6150893 (2000-11-01), Fattaruso
patent: 2003/0001685 (2003-01-01), Groe et al.
Ali Hajimira and Thomas H. Lee, “Design Issues in CMOS Differential LC Oscillators”, IEEE Journal of Solid State Circuits, vol. 34, No. 5, May 1999, (pp. 717-724).
Hung Chih-Jen
Sheng Samuel W.
Shenoy Ravindra
Chang Joseph
LSI Logic Corporation
Thelen Reid & Priest LLP
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