Oscillators – Solid state active element oscillator – Transistors
Reexamination Certificate
2003-05-19
2004-10-19
Kinkead, Arnold (Department: 2817)
Oscillators
Solid state active element oscillator
Transistors
C331S03600C, C331S1170FE, C331S1170FE, C331S167000, C257S531000
Reexamination Certificate
active
06806785
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to an oscillator circuit.
In mobile radio, for example, fully integrated VCO's (voltage-controlled oscillators) are used in the gigahertz range, high requirements with regard to phase noise being imposed on the oscillators. At the same time, there is a desire for integrated circuits which require as little space as possible, chips with the smallest possible number of terminal pins and good properties with regard to electromagnetic compatibility.
Integrated VCOs can be realized as LC oscillators, for example. While the integration of the resonant circuit capacitances for such VCOs can be realized comparatively simply and with a small chip area requirement, the integration for realization of the resonator inductors is comparatively complicated. Examples of possible realizations of inductors are spiral arrangements arranged for example on an integrated circuit or printed circuit board, active inductors which can be realized with a capacitance and a gyrator circuit connected thereto, and the utilization of actually parasitic inductive properties of bonding wires. It holds true here as a rule of thumb formula that the inductance of a bonding wire is approximately 1 nH per mm.
The advantage of bonding wires as inductors in LC oscillators resides in the high quality factor that can be achieved. In the case of the bonding wires, a distinction is made between the bonding of pads, that is to say contact points on a chip, to a pin, of a pad to a carrier element of the chip, and of one pad of the chip to another.
The document “A 1.8-GHz CMOS Low-Phase-Noise Voltage-Controlled Oscillator with Prescaler”, Jan Craninckx, M. Steyaert, IEEE Journal on Solid-State Circuits, Vol. 30, No. 12, 1995, pages 1474 to 1482, specifies the implementation of a VCO in a PLL (phase-locked loop). In this case, the VCO is embodied as a tunable LC oscillator. Bonding wire inductances are provided as inductors in the LC oscillator. In this case, the bonding wire inductors are embodied from one contact point of the chip to another contact point of the chip, which requires a very large chip area requirement.
The document “A packaged 1.1-GHz CMOS VCO with Phase Noise of −126 dBc/Hz at a 600-kHz Offset”, Hung et al., IEEE Journal on Solid-State Circuits, Vol. 35, No. 1, 2000, pages 100 to 103, likewise discloses a voltage-controlled oscillator, in which a combination of a spiral inductive element integrated on the chip, a plurality of bonding wires from the chip to pins, and intermediate pins is provided for the realization of the inductor of the LC oscillator. This requires four additional pins on the chip and, moreover, a larger chip area requirement and undesirable signal couplings to the housing result.
The document “A 1.3 GHz Low-Phase Noise Fully Tuneable CMOS LC VCO”, F. Svelto et al., IEEE Journal on Solid-State Circuits, Vol. 35, No. 3, 2000, pages 356 to 361, likewise specifies a voltage-controlled LC oscillator. Here, too, bonding wire inductances are provided which produce the inductors of the LC core in addition to integrated inductors. This combination also leads to a high chip area and pin requirement of the arrangement.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide an oscillator circuit which overcomes the above-mentioned disadvantages of the prior art apparatus of this general type. In particular, it is an object of the present invention to provide an oscillator circuit having a small chip area requirement, a high quality factor, and good phase noise properties.
With the foregoing and other objects in view there is provided, in accordance with the invention, an oscillator circuit, including: a supply voltage source having a supply potential terminal and a reference-ground potential terminal; a carrier; a semiconductor chip having a front side and a rear side fixed to the carrier; and an oscillator core integrated on the semiconductor chip. The oscillator core includes a pair of first circuit nodes, a first capacitance, a first inductor connected to the first capacitance at a first one of the pair of first circuit nodes, a second capacitance, and a second inductor connected to the second capacitance at a second one of the pair of first circuit nodes. The oscillator circuit also includes a de-attenuation amplifier integrated on the semiconductor chip. The de-attenuation amplifier is coupled to the oscillator core and to the supply voltage source. The oscillator circuit also includes a pair of contact points. The first inductor is formed as a bonding wire having a first terminal connected to a first one of the pair of contact points and a second terminal connected to the carrier. The second inductor is formed as a bonding wire having a first terminal connected to a second one of the pair of contact points and a second terminal connected to the carrier. The first one of the pair of contact points is connected to the first one of the pair of first circuit nodes. The second one of the pair of contact points is connected to the second one of the pair of first circuit nodes.
In accordance with an added feature of the invention, the second terminal of the bonding wire forming the first inductor is connected to the reference-ground potential terminal; and the second terminal of the bonding wire forming the second inductor is connected to the reference-ground potential terminal.
In accordance with an additional feature of the invention, the semiconductor chip has a p-type substrate.
In accordance with another feature of the invention, an adhesive fixes the rear side of the semiconductor chip on a carrier.
In accordance with a further feature of the invention, there is provided: a resonance transformation circuit coupling the oscillator core and the de-attenuation amplifier; a pair of second circuit nodes; a further inductor connected to a first one of the pair of second circuit nodes; and another further inductor connected to a second one of the pair of second circuit nodes. The resonance transformation circuit includes a first coupling capacitor connected to the first one of the pair of first circuit nodes and to the first one of the pair of second circuit nodes. The resonance transformation circuit includes a second coupling capacitor connected to the second one of the pair of first circuit nodes and to the second one of the pair of second circuit nodes.
In accordance with a further added feature of the invention, the de-attenuation amplifier has at least one NMOS transistor.
In accordance with a further additional feature of the invention, the first capacitance is embodied as a first varactor diode having a voltage-dependent capacitance value; and the second capacitance is embodied as a second varactor diode having a voltage-dependent capacitance value.
In accordance with yet an added feature of the invention, there is provided, a terminal for obtaining a control voltage for setting the capacitance value of the first varactor diode and for setting the capacitance value of the second varactor diode. The first varactor diode has an anode, and the second varactor diode has an anode connected to the anode of the first varactor diode. The terminal for obtaining the control voltage is connected to the anode of the first varactor diode and to the anode of the second varactor diode.
In accordance with yet another feature of the invention, the oscillator core and the resonance transformation circuit are symmetrically designed for carrying differential signals; and the de-attenuation amplifier is a differential amplifier having two cross-coupled transistors.
The semiconductor chip may be designed as a chip. The carrier may, for example, be part of a leadframe on which the semiconductor chip is arranged. On the carrier, conductor tracks may run outside the semiconductor chip, to which conductor tracks, the second terminals of the bonding wires may be connected. The carrier may be a printed circuit board. The carrier may be a metallic carrier. The carrier may be a further semiconductor chip.
Greenberg Laurence A.
Infineon - Technologies AG
Kinkead Arnold
Locher Ralph E.
Stemer Werner H.
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