Oscillators – With synchronizing – triggering or pulsing circuits – Triggering or pulsing
Reexamination Certificate
2002-10-07
2004-10-26
Mis, David (Department: 2817)
Oscillators
With synchronizing, triggering or pulsing circuits
Triggering or pulsing
C331S057000
Reexamination Certificate
active
06809605
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an oscillator circuit which is capable of controlling its actuation/stoppage, a semiconductor device and a semiconductor memory device provided with the oscillator circuit, and a control method of the oscillator circuit. More particularly, the invention relates to operational stability at the start of oscillation.
2. Description of the Related Art
In view of the recent progress in electronic devices having advanced functions, there is a strong demand for the reduction of current consumption in a circuit of semiconductor devices or semiconductor memory devices together with the demand for advanced functions. Technologies for reducing current consumption are now considered to be a necessity not only for portable electric devices but it is considered essential for future products in connection with the recent tendency of energy conservation caused by an increase in environmental problems.
To meet such a demand, control has been performed to reduce bias current necessary for circuit operation to the limit, and to stop unnecessary circuit operation. The same control is conducted for oscillating operation of an oscillator circuit. Circuitry has been presented, in which a bias current necessary for oscillating operation is reduced to the limit. Control to reduce current consumption such as stopping the oscillating operation of the oscillator circuit and further shutting off a current path of a bias circuit in a stand-by period such as a power-down mode where operation of only a limited circuit is conducted.
In a semiconductor device
1000
shown in
FIG. 22
, when an external interface of a voltage higher than its own power source voltage is necessary, or when access is made to a memory cell, a boosted voltage higher than the power source voltage may be necessary, or a negative voltage may be necessary for backgate biasing of a MOS transistor. Accordingly, a boosting
egative power source circuit
200
is provided. Generally, in the semiconductor device
1000
, in order to generate a boosted voltage higher than a power source voltage or a negative voltage of reverse polarity inside the device, electric charges must be supplied to a capacitor by a charge pump system or the like, or drawn out from the capacitor. Thus, an oscillation signal is entered from an oscillator circuit
100
to the boosting
egative power source circuit
200
.
Here, the reason why two sets of oscillator circuits
100
are provided in
FIG. 22
is to supply an oscillation signal to the boosting
egative power source circuit
200
according to the operation state in the semiconductor device
1000
. For one oscillator circuit
100
, an activation signal ACT is entered into an enable (EN) terminal. For the other oscillator circuit
100
, a stand-by signal SBY inverted from the activation signal ACT is entered into an enable (EN) terminal.
If the activation signal ACT is in an activated state, since an internal circuit
400
is in an operating state, the boosting
egative power source circuit
200
must have a sufficient power supplying capability. Accordingly, in order to secure a sufficient power supply capability from the boosting
egative power source circuit
200
, the oscillator circuit
100
activated by the activation signal ACT must output an oscillation signal at a high oscillation frequency. At this time, the oscillator circuit
100
activated by the stand-by signal SBY is in a stopped state.
If the stand-by signal SBY is in an activated state, the internal circuit
400
is in a stand-by state. In this case, current consumed at the semiconductor device
1000
must be reduced to the minimum. Accordingly, it is only necessary for the boosting
egative power source circuit
200
to supply minimum required power to maintain a bias state in the internal circuit
400
. Thus, the oscillator circuit
100
activated by the stand-by signal SBY may be operated at a lower frequency compared with that in the activated state. At this time, the oscillator circuit
100
activated by the activation signal ACT is in a stopped state.
In a semiconductor memory device
2000
shown in
FIG. 23
, as in the case of the semiconductor device
1000
(FIG.
22
), a boosting
egative power source circuit
200
may be necessary for supplying a boosted voltage or a negative voltage to an internal circuit
410
. An oscillator circuit
100
which oscillates at a high frequency during activation, and an oscillator circuit
100
which oscillates at a low frequency in a stand-by period are switched to be used. Further, in the semiconductor memory device
2000
, a refresh control circuit
300
is provided to refresh electric charges stored in a memory cell
500
. At the oscillator circuit
100
, a refreshing cycle is timed to perform cyclical refreshing operation. In the semiconductor memory device
2000
, this oscillator circuit
100
is configured to operate when the activation signal ACT is in an activated state. In an operation specification of the portable device or the like in which data holding operation is necessary only in an activated state, current consumption can be reduced to the limit during a stand-by period by stopping the oscillator circuit
100
in a stand-by state to suspend the refreshing operation.
Hereinafter, an oscillator circuit
100
as a first prior art is described. The oscillator circuit
100
in
FIG. 24
includes a controller section
4
in addition to an oscillator section
5
, and an oscillation frequency of the oscillator section
5
is controlled to be a predetermined frequency by an oscillation-frequency control signal VR from the controller section
4
. The controller section
4
and the oscillator section
5
are controlled by an enable signal EN, and actuated/stopped according to the enable signal EN. They are designed such that unnecessary oscillating operation is stopped by the control of the enable signal EN, thereby reducing current consumption. In order to achieve oscillating operation with a predetermined frequency by required minimum current consumption, the controller section
4
is constructed separately from the oscillator section
5
to supply a required minimum bias. In stoppage, the operation is stopped to reduce current consumption.
FIG. 25
shows an oscillator circuit of a first specific example of the first prior art. In the controller section
410
, a switch element S
100
controlled by the enable signal EN is connected to a power source voltage VDD and a source terminal of a PMOS transistor TP
100
, and an oscillation-frequency control signal VR is output from a gate terminal and a drain terminal connected to each other. Connection is also made through a resistance element R
100
to a ground voltage VSS. The oscillation-frequency control signal VR is generated by a bias current IC flowing on a current path formed through the switch element S
100
, the PMOS transistor TP
100
and the resistance element R
100
. Here, the bias current IC is generally set to a small current value limited by a request for a low current consumption operation. For example, if a resistance value of the resistance element R
100
is set to 1 MQ, then the bias current IC is set to about several microamperes.
In an oscillator section
500
, odd stages (3 stages in
FIG. 25
) of inverter elements INV
100
to INV
102
are connected in a loop to form a ring oscillator. A power source terminal of each of the inverter elements INV
100
to INV
102
is connected through a PMOS transistor TP
101
to a power source voltage VDD. A gate terminal of the PMOS transistor TP
101
is controlled by an oscillation-frequency control signal VR. An oscillation signal VOSC is output from the inverter element INV
102
through a switch element S
101
controlled by the enable signal EN.
FIG. 26
shows an oscillator circuit of a second specific example of the first prior art. An oscillator section
54
is provided in place of the oscillator section
500
of the first specific example. The oscillator section
54
includes a NOR element NOR
100
in place
Kawamoto Satoru
Ogawa Yasushige
Arent & Fox PLLC
Mis David
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