Oscillator circuit

Details Oscillator circuit Oscillator circuit

2002-03-27

2003-07-01

Cunningham, Terry D. (Department: 2816)

Oscillators

Polyphase output

C331S111000, C331S143000

Reexamination Certificate

active

06587006

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an oscillator circuit, and more particularly, to a multiphase triangular wave oscillator circuit used, for example, in a PWM switching regulator.
The increase in the operating speed of recent central processing units (CPUs) has increased the current consumed by a CPU. A switching regulator, which supplies current to the CPU, must have a large current output and high efficiency. The switching regulator goes ON and OFF at a high speed in response to a triangular wave signal, which is generated by a triangular wave oscillator circuit, to generate a pulse signal. Further, the switching regulator smoothens the pulse signal and generates a DC voltage.
To increase the current output from the switching regulator, a plurality of regulators may be connected parallel to one another (i.e., configure multiple channels) so that the output of the regulators (pulse signals) are synthesized. A ripple current, which is produced at the input of the switching regulator, decreases the efficiency of the regulator. It is thus required that multiple channels be configured in the triangular wave oscillator circuit, which generates the triangular wave, to prevent the efficiency from decreasing.
FIG. 1
is a schematic circuit diagram of a prior art triangular wave oscillator circuit
50
. The oscillator circuit
50
includes a first current source
51
, a second current source
52
, a charge/discharge switching circuit
53
, a capacitor CT, a switch SW, a first op amp
54
, and a second op amp
55
.
A first current I
1
flows from the first current source
51
in accordance with the power supplied from a power supply VD. The first current source
51
is connected to the ground GND via the capacitor CT and connected to the second current source
52
via a switch SW. The second current source
52
is connected to the ground GND. A second current I
2
flows from the second current source
52
in accordance with the power supplied from the power supply VD. The drive current value of the second current source
52
is two times greater than that of the first current source
51
.
The charge/discharge switching circuit
53
includes a first comparator
53
a
, a second comparator
53
b
, and a flip-flop
53
c
. The charge/discharge switching circuit
53
opens and closes the switch SW in accordance with a voltage Vn
1
at a node N
1
between the first current source
51
and the capacitor CT to generate a switching signal, which opens and closes the switch SW.
The first comparator
53
a
has a non-inverting input terminal supplied with the node voltage Vn
1
and an inverting input terminal supplied with a first reference voltage VrH. The first comparator
53
a
generates a first comparator signal at a high level when the node voltage Vn
1
becomes greater than or equal to the first reference voltage VrH.
The second comparator
53
b
has an inverting input terminal supplied with the node voltage Vn
1
and a non-inverting input terminal supplied with a second reference voltage VrL. The second comparator
53
b
generates a second comparator signal at a high level when the node voltage Vn
1
becomes less than or equal to the second reference voltage VrH.
The flip-flop
53
c
has a set signal input terminal S, which receives the first comparator signal, and a reset signal input terminal R, which receives the second comparator signal. When the first comparator signal is high, the flip-flop
53
c
generates the switching signal SQ so that the switch SW is closed. When the second comparator signal is high, the flip-flop
53
c
generates the switching signal SQ so that the switch SW is opened.
In the oscillator circuit
50
, when the switch SW is opened, the first current I
1
charges the capacitance CT and increases the node voltage Vn
1
. When the node voltage Vn
1
becomes greater than or equal to the first reference voltage VrH, the first comparator signal of the first comparator
53
a
goes high. In response to the high first comparator signal, the flip-flop
53
c
closes the switch SW.
As a result, the closed switch SW causes the second current I
2
to flow from the second current source
52
. The current value of the second current I
2
is two times greater than that of the first current I
1
(I
2
=2×I
1
). Accordingly, discharge current (I
2
-I
1
) flows from the capacitance CT to the ground GND. This decreases the node voltage Vn
1
. The drive current value of the second current source
52
is two times greater than that of the first current source
51
. Thus, the rate at which the node voltage Vn
1
increases is equal to the rate at which the node voltage Vn
1
decreases.
When the node voltage Vn
1
becomes less than or equal to the second reference voltage VrL, the second comparator signal of the second comparator
53
b
goes high. The high second comparator signal resets the flip-flop
53
c
and inverts the switching signal SQ. The inverted switching signal SQ opens the switch SW. As a result, the first current I
1
charges the capacitance CT and increases the node voltage Vn
1
again.
The oscillator circuit
50
repeats such operation to generate a triangular wave signal Vct, which varies between the first reference voltage VrH and the second reference voltage VrL.
The first op amp (inverting amplification circuit)
54
has an inverting input terminal, which is supplied with the node voltage Vn
1
via a resistor R
4
, and a non-inverting input terminal, which is supplied with a third reference voltage Vtha. The first output signal VA of the first op amp
54
is returned to the inverting input terminal via a resistor R
5
. The first output signal VA has a voltage obtained by inversely amplifying the node voltage Vn
1
in accordance with the third reference voltage Vtha.
The second op amp (non-inverting amplification circuit)
55
has a non-inverting input terminal, which is supplied with the node voltage Vn
1
, and an inverting input terminal, which is supplied with a fourth reference voltage Vthb via a resistor R
6
. The second output signal VB of the second op amp
55
is returned to the inverting input terminal via a resistor R
7
. The second output signal VB has a voltage obtained by amplifying the node voltage Vn
1
in accordance with the fourth reference voltage Vthb.
The resistance values of the resistors R
4
-R
7
are set so that the amplifying rates of the first and second op amps
54
,
55
are virtually the same. The third and fourth reference voltages Vtha, Vthb are set at a median voltage between the first and second reference voltages VrH, VrL ((VrH+VrL)/2)). Accordingly, the phase of the first output signal VA is the same as that of the triangular wave signal, and the phase of the second output signal VB is opposite to that of the triangular wave signal Vct.
The first and second output signals VA, VB, which have difference phases, alternately activates and inactivates two output transistors. This decreases the ripple current generated at the input of a switching regulator. As a result, the current output of the switching regulator increases, and the efficiency of the switching regulator increases.
To further increase the current output and efficiency of the switching regulator, a triangular wave having three or more phases must be generated. The prior art oscillator circuit
50
can generate two triangular wave signals (first and second output signals VA, VB) having opposite phases. However, the configuration of the oscillator circuit
50
becomes complicated when a triangular wave signal having multiple phases (three or more phases) must be generated. Therefore, the generation of a triangular wave signal having three or more phases is difficult.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an oscillator circuit that efficiently generates a triangular wave signal having multiple phases.
To achieve the above object, the present invention provides an oscillator circuit including a plurality of capacitors, each having two terminals and having a voltage between the two terminals. The plur

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