Oscillators – Solid state active element oscillator – Transistors
Reexamination Certificate
1999-03-16
2001-01-23
Pascal, Robert (Department: 2817)
Oscillators
Solid state active element oscillator
Transistors
C331S158000
Reexamination Certificate
active
06177847
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an oscillating circuit having a function for outputting an oscillating signal by employing a crystal oscillating element or the like, or for outputting an oscillating signal in response to a clock signal supplied from outside.
2. Description of Related Art
A conventional crystal oscillating circuit has a crystal oscillator, a resisting means, a NOR gate, and inverter. One electrode of the crystal oscillator is coupled to a first terminal via a switch, while the other electrode of the crystal oscillator is coupled to a second terminal. The resisting means is coupled between the first terminal and the second terminal. The resisting means is composed of a p-channel type field-effect transistor (hereinafter referred to as “PMOS”) and an n-channel field-effect transistor (hereinafter referred to as “NMOS”), the PMOS and the NMOS being connected in parallel to each other between the first terminal and the second terminal. The gate of the PMOS is connected to a ground GND to which a ground potential is applied, while the gate of the NMOS is connected to a power source VDD to which a power potential is applied. The PMOS and the NMOS are always in a conducting state. One input terminal of the NOR gate is connected to the first terminal, the NOR gate being connected between the power source VDD and the ground GND. A standby signal STBY is applied to the other input terminal of the NOR gate. The output terminal of the NOR gate is connected to the second terminal. The inverter is connected to the output terminal of the NOR gate.
The operation of the conventional oscillating circuit will now be described. The standby signal STBY is a signal for setting a low power consumption mode. In the low power consumption mode, the standby signal STBY is set to H level indicative of “valid”, while in a normal operation mode, the standby signal STBY is set to L level indicative of “invalid”. If the switch is ON in the normal mode, i.e., if the standby signal STBY is L level, then oscillation by the crystal oscillator is performed. At this time, the crystal oscillator operates as a series resonance circuit having an intrinsic series resonance frequency f. The resisting means works as a feedback resistor. The NOR gate is operated as an inverting amplifier by the resisting means. If the series resonance frequency of the crystal oscillator is f, and the gain of the inverting amplifier is x1 or more, then the oscillation is maintained at the frequency f. In the low power consumption mode, i.e., when the standby signal STBY is H level, the NOR gate stops outputting the oscillation signal. The output terminal of the NOR gate is fixed at the ground potential.
SUMMARY OF THE INVENTION
An object of the present invention is to reduce the power consumed in an oscillating circuit.
To this end, according to the present invention, there is provided an oscillating circuit comprising: a first terminal; a second terminal, a gate circuit coupled between a first electrical source and a second electrical source, the gate circuit receiving a signal supplied to the first terminal and a standby signal, the gate circuit outputting an oscillating signal from an output terminal in response to the signal supplied to the first terminal when the standby signal has a first level, the gate circuit outputting no oscillating signal from the output terminal when the standby signal has a second level; and a switch circuit having one end coupled to the output terminal of the gate circuit and the second terminal, and the other end coupled to the first terminal, the switch circuit electrically connecting the first terminal and the second terminal when the standby signal has the first level, the switch circuit electrically disconnecting the first terminal and the second terminal when the standby signal has the second level; and an output circuit outputting a signal in response to a signal outputted from the output terminal of the gate circuit.
The present invention further includes various aspects that will be understood from the following embodiments set forth below.
REFERENCES:
patent: 5777523 (1998-07-01), Lee et al.
Glenn Kimberly
OKI Electric Industry Co., Ltd.
Pascal Robert
Volentine, LLC Jones
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