Oscillating and dividing circuit having level shifter for electr

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

58 23A, 307247R, 307251, G04C 300, H03K 1760

Patent

active

040954072

ABSTRACT:
An oscillation and dividing circuit having a level shifter for an electric timepiece comprises an oscillating circuit, a multi-stage dividing circuit for dividing the frequency of the oscillating circuit and a delay circuit. The outputs of the dividing circuit and the delay circuit are connected through a NAND circuit to the base of a P-FET of the level shifter circuit. The output of the oscillating circuit is connected through an inverter to one input terminal of the first stage of the dividing circuit and through a second inverter to the other input terminal. The output of one stage of the dividing circuit is connected as a control circuit to the delay circuit, thereby supplying a square wave control signal even if the oscillating circuit produces a distorted signal. The pulse width of the pulse applied to the level-shifter is hence constant in spite of poor functioning of the oscillating circuit and a high output voltage is attained.

REFERENCES:
patent: 3948035 (1976-04-01), Kusumoto

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