Boots – shoes – and leggings
Patent
1994-12-27
1995-12-19
Bowler, Alyssa H.
Boots, shoes, and leggings
364726, 395375, G06F 15332
Patent
active
054774780
ABSTRACT:
The output of a butterfly unit is entered into a product-sum unit in a forward DCT and the output of the product-sum unit is entered into the butterfly unit in an inverse DCT. The product-sum unit employs, as a bit-string distribution circuit, a register circuit having eight bit shift registers each having a 16-bit parallel input and a 2-bit shift output and the bit shift registers are different in bit width from one another. Data are entered into the bit shift registers with the largest bit-width bit shift register first, such that the respective bit shift registers are shifted rightward by 2 bits per cycle. Four shift registers are disposed between the bit-string distribution circuit and a RAG circuit such that, when bit strings are entered, as delayed cycle by cycle, into eight RAGs of the RAC circuit, the final accumulation results are successively provided from the RACs in a proper order. This reduces the bi-directional DCT processor in circuit arrangement.
REFERENCES:
patent: 4791598 (1988-12-01), Liou et al.
patent: 5093801 (1992-03-01), White et al.
patent: 5103419 (1993-02-01), Toyokura et al.
patent: 5191548 (1993-03-01), Balkanski et al.
patent: 5278781 (1994-01-01), Aono et al.
patent: 5293596 (1994-03-01), Toyokura et al.
patent: 5299320 (1994-03-01), Aono et al.
Matsumoto Yoshifumi
Okamoto Kiyoshi
Toyokura Masaki
Bowler Alyssa H.
Follansbee John
Matsushita Electric - Industrial Co., Ltd.
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