Image analysis – Image compression or coding
Reexamination Certificate
1998-06-01
2001-03-13
Couso, Jose L. (Department: 2721)
Image analysis
Image compression or coding
C382S248000
Reexamination Certificate
active
06201895
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an orthogonal converting apparatus which is used for a high efficient encoding of a video signal or the like.
2. Related Background Art
Hitherto, as a method of high efficient encoding an image or a voice, an orthogonal converting process such as a discrete cosine transformation (DCT) or the like has been known.
FIG. 1
shows a two-dimensional DCT processing circuit for an input signal comprising a block of (8×8) pixels. The DCT processing circuit is constructed by two one-dimensional DCT circuits for eight input signals and a transposition circuit. Since a processing time of the one-dimensional DCT circuit is especially long, some high speed algorithms have been considered.
FIG. 2
shows an example of a one-dimensional DCT using a known high speed algorithm. In such a DCT, a symmetry of a transforming equation of the DCT is utilized, the addition and subtraction are preliminarily symmetrically executed to input signals and the results are combined, thereby reducing the number of multiplications to half of the number.
A high speed algorithm using a butterfly method such as an FFT is also widely known. In this algorithm, common portions included in the transforming equation of the DCT are combined, thereby further reducing the number of multiplications. Since many of the apparatuses using the high speed algorithm have, however, a large circuit scale, it has been pointed out that they are unsuitable for an application to formation of an LSI or the like.
A system in which the signal converted by the DCT is weighted by using visual sense characteristics such that the human eyesight is dull to high frequencies is also generally used. In such a system, an encoding efficiency is often intended to be raised by largely weighting a signal indicative of low frequencies and slightly weighting a signal indicative of high frequencies.
FIGS. 3A and 3B
show examples of a 2-dimensional DCT in which a weighting process is performed.
FIG. 3A
shows the example in which the weighting process is executed after the ordinary 2-dimensional DCT.
FIG. 3B
shows the example in which the weighting process is executed every 1-dimensional DCT. A method of using both of the DCT and multipliers for weighting is well known and is shown in Japanese Patent Laid-Open Application No. 2-116969.
On the other hand, in a highly efficient encoding of a TV video signal or the like in which an input signal is constructed by two fields having a time deviation, an idea such that a motion between the fields is detected and a method of the DCT is switched is widely used.
FIG. 4
shows one example of such a method. Before executing a DCT process, a motion information signal is supplied from a motion detection circuit (not shown) to a DCT circuit, and in accordance with the presence or absence of the motion, a DCT method is switched to either one of a method of performing an ordinary 2-dimensional DCT to (8×8) input signals and a method of dividing the input signals into two sets of (4×8) input signals comprising the addition and subtraction between the fields and performing the 2-dimensional DCT to each set.
In many DCT circuits, as mentioned above, there is a problem of an increase in circuit scale because of the idea of improving the high processing speed and high efficiency. Especially, in an application such that both of the DCT and an IDCT which is an inverse transformation of the DCT are necessary, there is a problem such that the circuit scale further increases and it is difficult to form an LSI.
SUMMARY OF THE INVENTION
The invention is made to solve the above-mentioned problems and an object of the invention is to obtain an orthogonal converting apparatus which can execute a process at a high speed and also can reduce a circuit scale.
According to an embodiment of the invention, there is provided an orthogonal converting apparatus comprising: addition-subtraction operation means for calculating the addition and difference between two signal trains each consisting of (n) (n≧1) signals; two multiplication-addition operation means each for calculating multiplication-addition of the (n) signals; a transposition circuit for permutating (2n×2n) signals arranged in the horizontal and vertical directions; and control means for controlling an operation of each of the above-mentioned means, wherein the control means executes the following processes by controlling the operations of the above-mentioned means: a first encoding process for executing a 2-dimensional orthogonal converting process to the (2n×2n) input signals; a first decoding process corresponding to the first encoding process; a second encoding process for separating the (2n×2n) input signals into (n×2n) signals each corresponding to an addition of adjacent lines and, likewise (n×2n) signals each corresponding to a subtraction of adjacent lines and performing the 2-dimensional orthogonal converting process; and a second decoding process corresponding to the second encoding process.
According to another embodiment of the invention, there is provided an orthogonal converting apparatus comprising: addition-subtraction operation means for calculating the addition and difference between two signal trains each consisting of (n) (n≧1) signals; two multiplication-addition operation means each for calculating multiplication-addition of the (n) signals; a transposition circuit for permutating (2n×2n) signals arranged in the horizontal and vertical directions; weighting means for multiplying predetermined coefficients to the (n) signals, respectively; and control means for controlling an operation of each of the above-mentioned means, wherein the control means performs the following processes by controlling the foregoing means: a first encoding process for executing a weighted 2-dimensional orthogonal converting process to the (2n×2n) input signals; a first decoding process corresponding to the first encoding process; a second encoding process for separating the (2n×2n) input signals into (n×2n) signals each corresponding to an addition of adjacent lines and, likewise (n×2n) signals each corresponding to a subtraction of adjacent lines and performing the weighted 2-dimensional orthogonal converting process; and a second decoding process corresponding to the second encoding process.
According to still another embodiment of the invention, there is provided an orthogonal converting apparatus for forming addition components and difference components between two signal trains and executing a 2-dimensional orthogonal converting process to those components, comprising: first multiplication-addition operation means for calculating multiplication-addition between the addition components and predetermined coefficients; second multiplication-addition operation means for calculating multiplication-addition between the difference components and predetermined coefficients; transposition means for permutating the signals; and control means for controlling an operation of each of the above-mentioned means, wherein the control means executes a 2-dimensional orthogonal converting process by using each of the above-mentioned means in accordance with a predetermined sequence.
According to the foregoing embodiment, since constructional circuits can be commonly used in the DCT and IDCT processes, the circuit scale of the apparatus can be remarkably reduced.
An orthogonal converting apparatus according to another embodiment comprises: multiplication-addition operation means constructed by a butterfly circuit for calculating addition components; and multiplication-addition operation means constructed by a coefficient unit for calculating difference components and a switching unit.
In an orthogonal converting method according to still another embodiment, the addition components are weighted in a step of the orthogonal converting process and the difference components are weighted out of the orthogonal converting process.
Acco
Canon Kabushiki Kaisha
Couso Jose L.
Fitzpatrick ,Cella, Harper & Scinto
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