Orthogonal code generation apparatus, scrambling code...

Details Orthogonal code generation apparatus, scrambling code... Orthogonal code generation apparatus, scrambling code...

2008-01-15

2008-01-15

Fan, Chieh M. (Department: 2611)

Pulse or digital communications

Spread spectrum

C375S219000, C375S354000, C375S343000, C370S208000, C370S342000, C380S035000, C380S268000

Reexamination Certificate

active

07319712

ABSTRACT:
An orthogonal code generation apparatus can generate a sequence of orthogonal codes without having to prestore orthogonal code sequences in a memory, by applying logic operation on a sequence number and a location number using AND circuits A0, A1, A2, A3, . . . , Anand an adder circuit. A scrambling code generation apparatus computes only the values of registers involved with a feedback operation and a spreading operation, and loads respective values into the registers while shifting the shift register. When all the registers store valid values, scrambling codes are generated by a shift operation of the shift register.

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Hamamoto et al., “Hardware Architecture of the Scrambling Code Generator for W-CDMA” Transaction of Communications Society Conference, IEICE, Aug. 29, 2001, 1, p. 419, B-5-133 with partial English language translation.
Office Communication from the Japanese Patent Office dated Mar. 12, 2004 in Application No. 2001-152589 with English language translation.

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