Ornand flash memory and method for controlling the same

Details Ornand flash memory and method for controlling the same Ornand flash memory and method for controlling the same

2007-10-11

2011-11-22

Lam, David (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185210, C365S185180, C365S185330

Reexamination Certificate

active

08064264

ABSTRACT:
A semiconductor device that includes: a memory cell array that includes non-volatile memory cells; an area that is contained in the memory cell array and stores area data; a first storage unit that holds data transferred from the memory cell array, and outputs the data; and a control circuit that selects between a primary reading mode for causing the first storage unit to hold the area data transferred from the memory cell array and to output the area data, and a secondary reading mode for causing the first storage unit to hold a plurality of pieces of divisional data formed by dividing the area data and transferred from the memory cell array and to output the divisional data.

REFERENCES:
patent: 5481671 (1996-01-01), Fujisaki
patent: 6421279 (2002-07-01), Tobita et al.
patent: 6469955 (2002-10-01), Tsao et al.
patent: 7123521 (2006-10-01), Louie et al.
patent: 7546416 (2009-06-01), Yip
patent: 2003/0076719 (2003-04-01), Byeon et al.

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