Organic EL drive circuit and organic EL display device using...

Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device

Reexamination Certificate

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Details

C315S169300, C345S084000, C345S204000

Reexamination Certificate

active

06586888

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates an organic EL drive circuit and an organic EL display device using the same organic EL drive circuit and, particularly, the present invention relates to an organic EL display device, which can reduce luminance variation on a display screen of such as a portable telephone set, can achieve high integration density and is suitable for high luminance color display.
2. Description of the Prior Art
It has been known that an organic EL (Electro-Luminescence) display device, which realizes a high luminance display by light generated by itself, is suitable for a display in a small display screen and the organic EL display device has been attracting public attention as the next generation display device to be mounted on a portable telephone set, a DVD player or a PDA (Personal Digital Assistants) such as a portable terminal device, etc.
Known problems of the organic EL display device are that, when it is driven by voltage as in a liquid crystal display device, luminance thereof is substantially voltage dependent and that its sensitivity is color dependent and, therefore, a color display control thereof is difficult.
In view of these problems, an organic EL display device using a current drive circuit was proposed recently. For example, JP H10-112391 A discloses a technique with which the illumination variation problem is solved by employing the current drive system.
FIG. 7
shows an example of a current drive and control circuit of an organic EL display device of such kind, which is currently proposed, and FIG.
8
and
FIG. 9
show a current drive circuit thereof.
In
FIG. 7
, an organic display panel
1
of the organic EL display device for a portable telephone set having 396 (=198×2) terminal pins in a column line and 162 (=81×2) terminal pins in a row line is shown. The organic display panel
1
is constructed with two EL panels
1
a
and
1
b
, which are bonded together in center portions thereof.
On the organic display panel
1
, two column driver IC's
2
a
and
2
b
and two column driver IC's
2
c
and
2
d
are provided in the upper and lower EL panels
1
a
and
1
b
, respectively, and two row driver IC's
3
a
and
3
b
are provided correspondingly to the respective EL panels
1
a
and
1
b.
In a color display device, each of the column terminal driver IC's includes 66 terminal pins for each of R, G and B colors, resulting in 198 (66×3) terminal pins forming column output lines. It should be noted that, in
FIG. 7
, the three different colors are shown without discrimination and, in the following description, the organic display panel
1
has the EL panels
1
a
and
1
b
each having 396 (=198×2) terminal pins as the column output lines.
A power source (battery)
4
for driving the organic EL display panel supplies electric power to the column driver IC's
2
a
,
2
b
,
2
c
and
2
d
and the row driver IC's
3
a
and
3
b
. The power source voltage thereof is within a range from 12V to 15V and it may be, for example, 15V.
These driver IC's operate according to a control signal from a controller
5
. The column driver IC's are anode driving drivers for driving anodes of the EL elements and functions as current discharge side to supply currents to the organic EL elements to thereby scan respective output lines as horizontal lines. The row driver IC's are cathode driving drivers of the organic EL elements and function to sink currents flowing out from the organic EL elements to ground GND to thereby scan respective output lines as vertical lines.
The controller
5
is supplied with electric power from a power source (battery)
7
of 3V and operates under control of a MPU (Micro Processing Unit)
6
. The power source
4
may be realized by boosting the voltage of the power source
7
by means of a DC-DC converter.
FIG. 8
is a circuit diagram of one of the column driver IC's
2
a
to
2
d
, which includes 198 column line current driving circuits
8
provided correspondingly to the respective output lines, for current-driving the respective output lines, and a column control circuit
9
provided commonly for the column line current driving circuits
8
, for controlling them.
The column line current driving circuit
8
includes a sample and hold circuit
81
for generating a reference drive current, k-time drive current generator circuits
82
each having an input pin
82
a
supplied with the reference drive current from the sample and hold circuit
81
and amplifying the drive current k times and current mirror output circuits
83
as an output stage for further amplifying the output current of the k-time drive current generator circuits 82 k times. The column control circuit
9
includes a 4-bit D/A converter circuit
91
and a switching control circuit
92
.
The sample and hold circuit
81
is a reference current generator circuit (reference power source) driven by the battery
7
of 3V and holds a current data obtained by the D/A converter circuit
91
as a current sample and generates the reference drive current corresponding to an input data value.
Output terminals of the current mirror output circuits
83
as the output stage are connected to respective column pins
84
and driven by the outputs of the k-time drive current generator circuits
82
to generate output currents each being k times the output current of the k-time drive current generator circuits
82
, which is k times the reference drive current generated by the sample and hold circuit
81
. Thus, the reference current generated by the sample and hold circuit
81
correspondingly to the respective column pins is amplified k×k times and outputted from the current mirror output circuits
83
to the respective column pins
84
.
The generation of the output drive current, which is k×k times the reference drive current, by the k-time drive current generator circuit
81
and the current mirror output circuit
83
is to reduce the reference drive current to be generated in the sample and hold circuit
81
to the order of &mgr; A to thereby reduce power consumption thereof.
The switching control circuit
92
of the column control circuit
9
selectively operates the k-time drive current generator circuits
82
of the column line current drive circuit
8
, which are to be horizontally scanned, by sending a switching control signal in response to the control signal from the controller
5
. In this case, the data corresponding to a display luminance level in the horizontal scan, which is sent from the controller
5
is preliminarily supplied to the D/A converter circuit
91
. The analog signal (analog current value) obtained by the D/A converter circuit
91
is held in the sample and hold circuit
81
as a reference current. The reference current is multiplexed k×k times by the k-time drive current generator
82
and the current mirror circuit
83
, which are selected by the horizontal scan, to produce a drive current and the latter current is outputted to the output pin
84
.
FIG. 9
is a circuit diagram of either one of the row drivers
3
a
and
3
b
. In
FIG. 9
, the row driver includes 81 row line current drive circuits
10
provided correspondingly to the 81 output pins for sinking drive currents from the output lines to ground and a switching control circuit
11
commonly connected to the 81 row line drive circuits
10
. In
FIG. 9
, however, only one row line current drive circuit
10
corresponding to a row side pin
81
a
is shown for simplicity of illustration.
The row line drive circuit
10
is the so-called push-pull output circuit including transistors Tr
1
and Tr
2
, which are driven in the push-pull manner according to a drive signal from the switching control circuit
11
. Incidentally, when an output pin to be vertically scanned is selected, the transistor Tr
2
on the pull side is turned ON and becomes the current sink side, so that the current, which is outputted from the column side and drives the organic

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