Opto-electronic integrated circuit

Details Opto-electronic integrated circuit Opto-electronic integrated circuit

1999-03-19

2002-10-01

Pham, Long (Department: 2823)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Including integrally formed optical element

C438S022000, C438S024000, C438S029000, C438S030000, C438S046000

Reexamination Certificate

active

06458614

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an opto-electronic integrated circuit (OEIC) which includes an electronic circuit section and an optical circuit section, and has a structure capable of effecting an inter-connection (mutual conversion) between an electrical signal and an optical signal through a light emitting or light receiving layer consisting of a compound semiconductor formed on a silicon substrate.
2. Description of the Related Art
Silicon semiconductor technology has realized transistors to ICs (Integrated Circuit) and VLSIs (Very large Scale Integrated Circuit), and it is thought the integration scale will be continually increased in the future. In recent years, with an increase in integration scale, there has arisen a concern that the operation speed of such silicon devices will be limited by a retardation of the distribution in transmitting the electric signal. In order to solve that problem, an OEIC (Optical Electronic Integrated Circuit) technique involving a signal connection with the use of light has been developed.
When such an OEIC technique is to be established, the method for forming a light emitting or light receiving layer (hereinafter, referred to as light emitting/receiving layer) consisting of a compound semiconductor on a silicon substrate has been proved to be a most important basic technique. Conventionally, as a means for integrally forming a semiconductor compound on a single crystal silicon substrate, there have been suggested mainly two types of methods. One is the so-called super hetero-epitaxial method in which a semiconductor compound forming the light emitting/receiving layer, such as a GaAs layer or InP layer, is caused to epitaxially grown on a silicon substrate. The other is a direct bonding method in which a semiconductor compound forming the light emitting/receiving layer, such as a GaAs layer or InP layer, is directly bonded to a single-crystal silicon plate by virtue of a heating treatment.
However, the above-mentioned super hetero-epitaxial method requires that semiconductor compound layers having lattice constants different from that of silicon be integrally formed on the single-crystal silicon substrate. This necessarily causes a lattice mismatch between the semiconductor compound layers and the single-crystal silicon substrate and results in generation of a misfit dislocation in the compound semiconductor layers.
On the other hand, there is a problem that the interface between the compound semiconductor layers and the single-crystal silicon substrate formed by the above-mentioned direct bonding method is subject to thermal stress due to the difference in the thermal expansion coefficient between the silicon and the compound semiconductor during cooling after the high temperature treatment employed by the direct bonding. Such a thermal stress adversely change the physical properties of the semiconductor compound layers.
In addition, the OEIC generates heat at the semiconductor compound layers or the silicon substrate during operation, and the heat increases or moves the misfit dislocation and enhances the thermal stress. As a result, there also arises a problem that the operation characteristics of the OEIC change during its operation, which degrades the reliability of the OEIC.
For the foregoing reasons, it is still difficult to actually use a semiconductor compound device having a structure in which a semiconductor compound has been formed on a silicon substrate, and also it is difficult to actually use an OEIC in which silicon element and semiconductor compound element are monolithically integrated.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an improved OEIC in which a light emitting or receiving layer consisting of a semiconductor compound is monolithically formed on a silicon substrate.
The OEIC comprises a silicon substrate; an electronic circuit formed in the silicon substrate and processing an electric signal; a ZnO film formed on at least portion of the silicon substrate; and an optical circuit electrically connected to the electronic circuit. The optical circuit includes at least one GaN-based semiconductor compound layer which is provided on the ZnO film and the GaN-based semiconductor compound layer either receives or emits an optical signal.
The GaN-based semiconductor compound layer is preferably made of the conventional Ga
1−x
In
x
N, Ga
1−x
Al
x
N, Ga
1−x
B
x
N or mixed crystal thereof, and is formed at a temperature of 800° C. or lower. It is more preferable to employ an ECR-MBE method for forming the GaN-based semiconductor compound layer.
The OEIC may further comprise an optical waveguide which is made of ZnO and optically connected to the optical circuit. Alternatively, the OEIC may further comprise a SiO
2
film between the silicon substrate and the ZnO film while the ZnO film is optically connected to the optical circuit so as to act as an optical waveguide.
The electronic circuit preferably includes at least one MOSFET, and the optical circuit preferably includes at least one light emitting diode, laser or photodiode.
According to the present invention, since a ZnO film is formed to serve as a buffer layer, the GaN layer formed on the buffer layer has fewer misfit dislocations, thereby obtaining a good crystallinity.
Further, since the ZnO film serving as a buffer layer may be formed at a relatively low temperature with a method such as sputtering, it inhibits bad influences caused by high temperature and possibly brought to the metal wires of the electronic circuit section of an OEIC. Moreover, since the metal wire section is covered by the ZnO film, the metal wires may be protected from direct exposure to high temperature during the process for forming the GaN layer, thereby effectively inhibiting the above-mentioned bad influence. At this time, since an ECR-MBE method is used to form the GaN layer, the GaN layer may be formed at a relatively low temperature, thereby further inhibiting a possible bad influence to the metal wire section.
For the purpose of illustrating the invention, there is shown in the drawings several forms which are presently preferred, it being understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown.


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